71V124价格
参考价格:¥8.9351
型号:71V124SA10PHG 品牌:IDT 备注:这里有71V124多少钱,2026年最近7天走势,今日出价,今日竞价,71V124批发/采购报价,71V124行情走势销售排行榜,71V124报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
71V124 | 3.3V 128K x 8 Asynchronous Static RAM Center Power & Ground Pinout The 71V124 3.3V CMOS SRAM is organized as 128K x 8. The JEDEC center power/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is u JEDEC revolutionary pinout (center power/GND) for reduced noise\nEqual access and cycle times – Commercial: 10/12/15/20ns – Industrial: 10/12/15/20ns\nOne Chip Select plus one Output Enable pin\nInputs and outputs are LVTTL-compatible\nSingle 3.3V supply\nLow power consumption via chip deselect\nAva; | RENESAS 瑞萨 | ||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power and Ground Pinout 文件:68.86 Kbytes Page:8 Pages | IDT | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power and Ground Pinout 文件:68.86 Kbytes Page:8 Pages | IDT | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power and Ground Pinout 文件:68.86 Kbytes Page:8 Pages | IDT | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power and Ground Pinout 文件:68.86 Kbytes Page:8 Pages | IDT | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power and Ground Pinout 文件:68.86 Kbytes Page:8 Pages | IDT | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power and Ground Pinout 文件:68.86 Kbytes Page:8 Pages | IDT | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power and Ground Pinout 文件:68.86 Kbytes Page:8 Pages | IDT | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power and Ground Pinout 文件:68.86 Kbytes Page:8 Pages | IDT | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power and Ground Pinout 文件:68.86 Kbytes Page:8 Pages | IDT | |||
封装/外壳:32-SOIC(0.400",10.16mm 宽) 包装:管件 描述:IC SRAM 1MBIT PARALLEL 32TSOP II 集成电路(IC) 存储器 | RENESAS 瑞萨 | |||
封装/外壳:32-SOIC(0.400",10.16mm 宽) 包装:管件 描述:IC SRAM 1MBIT PARALLEL 32TSOP II 集成电路(IC) 存储器 | RENESAS 瑞萨 | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Revolutionary Pinout Description The IDT71V124 is a 1,048,576-bit high-speed static RAM organized as 128K x 8. It is fabricated using IDT’s high-performance, high-reliability CMOS technology. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for | IDT | |||
3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power & Ground Pinout Description The IDT71V124 is a 1,048,576-bit high-speed static RAM organized as 128K x 8. It is fabricated using IDT’s high-performance, high-reliability CMOS technology. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for | IDT | |||
Supports the ATmega2560, ATmega1280 and ATmega640 文件:704.79 Kbytes Page:17 Pages | ATMEL 爱特梅尔 | |||
STK503 User Guide 文件:704.79 Kbytes Page:17 Pages | ETCList of Unclassifed Manufacturers 未分类制造商 | |||
STK503 User Guide 文件:704.79 Kbytes Page:17 Pages | ETCList of Unclassifed Manufacturers 未分类制造商 |
71V124产品属性
- 类型
描述
- Density (Kb):
1024
- Bus Width (bits):
8
- Core Voltage (V):
3.3
- Pkg. Type:
SOJ
- Organization:
128K x 8
- I/O Voltage (V):
3.3
- Access Time (ns):
10
- Temp. Range:
-40 to 85°C
- Architecture:
Asynchronous
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
IDT |
24+ |
NA |
80000 |
只做自己库存 全新原装进口正品假一赔百 可开13%增 |
|||
IDT |
26+ |
PLCC-68 |
9526 |
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订 |
|||
IDT |
2026+ |
SOJ32 |
54658 |
百分百原装现货 实单必成 |
|||
IDT |
2101+ |
TSOP |
54 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
IDT |
2450+ |
SOJ |
9850 |
只做原厂原装正品现货或订货假一赔十! |
|||
RENESAS/瑞萨 |
25+ |
TSOP-32 |
32360 |
RENESAS/瑞萨全新特价71V124SA12PHGI即刻询购立享优惠#长期有货 |
|||
IDT |
2018+ |
26976 |
代理原装现货/特价热卖! |
||||
IDT |
22+ |
SOJ32 |
8900 |
全新正品现货 有挂就有现货 |
|||
IDT, Integrated Device Technol |
24+ |
32-SOJ |
56200 |
一级代理/放心采购 |
|||
IDT |
25+ |
SOP32 |
4500 |
全新原装、诚信经营、公司现货销售 |
71V124芯片相关品牌
71V124规格书下载地址
71V124参数引脚图相关
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71V124数据表相关新闻
716W-X2/0保证原装正品,现货价美
716W-X2/0保证原装正品,现货价美
2024-8-15721-833/001-000
721-833/001-000
2023-4-197211MD9AV2BE
7211MD9AV2BE
2022-12-287165-0796新到货只做原装,诚信为本!
16-02-0069 87439-0300 644752-5 9-1393222-1 281839-3 16-02-0115 0527451497 1379118-1 50-36-1678 189727-1 1-1102296-1 51191-0600 640250-4 171814-1009 15-24-6180 6-103672-9 345259-1 35507-0500 15-24-9144 15-24-9164 1-350944-0 794824-1 46114-1016 770586-1 502
2022-8-12719502C-2PT
https://hch01.114ic.com/
2020-11-137-215/R6C-AQ1R2B/3T原装现货
定位: Top View If - 順向電流: 20 mA 封裝: Reel 品牌: Everlight 安裝風格: SMD/SMT 濕度敏感: Yes 產品類型: LED - Standard 原廠包裝數量: 3000 子類別: LEDs
2019-11-4
DdatasheetPDF页码索引
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