71V124SA15YGI价格

参考价格:¥9.4595

型号:71V124SA15YGI 品牌:IDT 备注:这里有71V124SA15YGI多少钱,2025年最近7天走势,今日出价,今日竞价,71V124SA15YGI批发/采购报价,71V124SA15YGI行情走势销售排行榜,71V124SA15YGI报价。
型号 功能描述 生产厂家 企业 LOGO 操作
71V124SA15YGI

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

RENESAS

瑞萨

71V124SA15YGI

封装/外壳:32-BSOJ(0.400",10.16mm 宽) 包装:管件 描述:IC SRAM 1MBIT PARALLEL 32SOJ 集成电路(IC) 存储器

ETC

知名厂家

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

RENESAS

瑞萨

封装/外壳:32-BSOJ(0.400",10.16mm 宽) 包装:管件 描述:IC SRAM 1MBIT PARALLEL 32SOJ 集成电路(IC) 存储器

ETC

知名厂家

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

RENESAS

瑞萨

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

RENESAS

瑞萨

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

RENESAS

瑞萨

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

RENESAS

瑞萨

3.3V CMOS Static RAM1 Meg (128K x 8-Bit) Center Power & Ground Pinout

Features ◆ 128K x 8 advanced high-speed CMOS static RAM ◆ JEDEC revolutionary pinout (center power/GND) for reduced noise ◆ Equal access and cycle times – Commercial: 10/12/15ns – Industrial: 10/12/15ns ◆ One Chip Select plus one Output Enable pin ◆ Inputs and outputs are LVTTL-compatible

RENESAS

瑞萨

更新时间:2025-12-28 20:00:00
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