位置:SN74ABT823DBR > SN74ABT823DBR详情

SN74ABT823DBR中文资料

厂家型号

SN74ABT823DBR

文件大小

385.69Kbytes

页面数量

16

功能描述

9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

触发器 Tri-St 9bit Bus Int

数据手册

原厂下载下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74ABT823DBR数据手册规格书PDF详情

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0)

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

High-Impedance State During Power Up

and Power Down

High-Drive Outputs (–32-mA IOH, 64-mA IOL)

Buffered Control Inputs to Reduce

dc Loading Effects

Package Options Include Plastic

Small-Outline (DW) and Shrink

Small-Outline (DB) Packages, Ceramic Chip

Carriers (FK) and Flatpacks (W), and

Standard Plastic (NT) and Ceramic (JT)

DIPs

description

These 9-bit flip-flops feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. They are

particularly suitable for implementing wider buffer

registers, I/O ports, bidirectional bus drivers with

parity, and working registers.

With the clock-enable (CLKEN) input low, the nine

D-type edge-triggered flip-flops enter data on the

low-to-high transitions of the clock. Taking CLKEN

high disables the clock buffer, thus latching the

outputs. Taking the clear (CLR) input low causes

the nine Q outputs to go low, independently of the

clock.

A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high

or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines

without need for interface or pullup components.

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT823 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ABT823 is characterized for operation from –40°C to 85°C.

SN74ABT823DBR产品属性

  • 类型

    描述

  • 型号

    SN74ABT823DBR

  • 功能描述

    触发器 Tri-St 9bit Bus Int

  • RoHS

  • 制造商

    Texas Instruments

  • 电路数量

    2

  • 逻辑系列

    SN74

  • 逻辑类型

    D-Type Flip-Flop

  • 极性

    Inverting, Non-Inverting

  • 输入类型

    CMOS

  • 传播延迟时间

    4.4 ns

  • 高电平输出电流

    - 16 mA

  • 低电平输出电流

    16 mA

  • 电源电压-最大

    5.5 V

  • 最大工作温度

    + 85 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    X2SON-8

  • 封装

    Reel

更新时间:2026-2-5 14:01:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI
24+
3000
自己现货
TI
25+
SSOP24
171
百分百原装正品 真实公司现货库存 本公司只做原装 可
TI
24+/25+
9182
原装正品现货库存价优
TI
00/01+
TSSOP
4592
全新原装100真实现货供应
TI
25+
TSSOP
2987
只售原装自家现货!诚信经营!欢迎来电!
Texas Instruments
24+
24-SSOP(0.209
56300
TI
25+
IC
2000
就找我吧!--邀您体验愉快问购元件!
TI(德州仪器)
2021+
SSOP-24
499
TI/德州仪器
23+
SSOP24
50000
全新原装正品现货,支持订货
TI
22+
24SSOP
9000
原厂渠道,现货配单

SN74ABT823DBR 价格

参考价格:¥6.1195

型号:SN74ABT823DBR 品牌:TI 备注:这里有SN74ABT823DBR多少钱,2026年最近7天走势,今日出价,今日竞价,SN74ABT823DBR批发/采购报价,SN74ABT823DBR行情走势销售排排榜,SN74ABT823DBR报价。