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SN74ABT821ADWR中文资料

厂家型号

SN74ABT821ADWR

文件大小

343.04Kbytes

页面数量

15

功能描述

10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

触发器 3 St 10bit Bus Inter

数据手册

原厂下载下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74ABT821ADWR数据手册规格书PDF详情

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

High-Impedance State During Power Up

and Power Down

High-Drive Outputs (–32-mA IOH, 64-mA IOL)

Package Options Include Plastic

Small-Outline (DW) and Shrink

Small-Outline (DB) Packages, Ceramic Chip

Carriers (FK), Ceramic Flat (W) Package,

and Plastic (NT) and Ceramic (JT) DIPs

description

These 10-bit flip-flops feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. They are

particularly suitable for implementing wider buffer

registers, I/O ports, bidirectional bus drivers with

parity, and working registers.

The ten flip-flops are edge-triggered D-type

flip-flops. On the positive transition of the clock

(CLK) input, the devices provide true data at the

Q outputs.

A buffered output-enable (OE) input can be used

to place the ten outputs in either a normal logic

state (high or low logic levels) or a high-impedance

state. In the high-impedance state, the

outputs neither load nor drive the bus lines

significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines without need for interface or pullup

components.

OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can

be entered while the outputs are in the high-impedance state.

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT821 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ABT821A is characterized for operation from –40°C to 85°C.

SN74ABT821ADWR产品属性

  • 类型

    描述

  • 型号

    SN74ABT821ADWR

  • 功能描述

    触发器 3 St 10bit Bus Inter

  • RoHS

  • 制造商

    Texas Instruments

  • 电路数量

    2

  • 逻辑系列

    SN74

  • 逻辑类型

    D-Type Flip-Flop

  • 极性

    Inverting, Non-Inverting

  • 输入类型

    CMOS

  • 传播延迟时间

    4.4 ns

  • 高电平输出电流

    - 16 mA

  • 低电平输出电流

    16 mA

  • 电源电压-最大

    5.5 V

  • 最大工作温度

    + 85 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    X2SON-8

  • 封装

    Reel

更新时间:2026-2-16 8:14:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI
25+
SO24
7786
原装正品现货,原厂订货,可支持含税原型号开票。
24+
3000
自己现货
TI
25+
SOP
202
百分百原装正品 真实公司现货库存 本公司只做原装 可
TI
23+
8/SOP
5000
原装正品,假一罚十
TEXASINSTRU
24+
原封装
1580
原装现货假一罚十
TI
25+23+
SOP
67131
绝对原装正品现货,全新深圳原装进口现货
TI
25+
SOP-24
30000
代理全新原装现货,价格优势
Texas Instruments
24+
24-SOIC(0.295
56300
TI
25+
IC
2000
就找我吧!--邀您体验愉快问购元件!
TI(德州仪器)
2021+
SOIC-24
499

SN74ABT821ADWR 价格

参考价格:¥5.2464

型号:SN74ABT821ADWR 品牌:TI 备注:这里有SN74ABT821ADWR多少钱,2026年最近7天走势,今日出价,今日竞价,SN74ABT821ADWR批发/采购报价,SN74ABT821ADWR行情走势销售排排榜,SN74ABT821ADWR报价。