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SN74ABT821ADWR.B中文资料

厂家型号

SN74ABT821ADWR.B

文件大小

343.04Kbytes

页面数量

15

功能描述

10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

SN74ABT821ADWR.B数据手册规格书PDF详情

State-of-the-Art EPIC-IIBE BiCMOS Design

Significantly Reduces Power Dissipation

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015

Latch-Up Performance Exceeds 500 mA Per

JEDEC Standard JESD-17

Typical VOLP (Output Ground Bounce) < 1 V

at VCC = 5 V, TA = 25°C

High-Impedance State During Power Up

and Power Down

High-Drive Outputs (–32-mA IOH, 64-mA IOL)

Package Options Include Plastic

Small-Outline (DW) and Shrink

Small-Outline (DB) Packages, Ceramic Chip

Carriers (FK), Ceramic Flat (W) Package,

and Plastic (NT) and Ceramic (JT) DIPs

description

These 10-bit flip-flops feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. They are

particularly suitable for implementing wider buffer

registers, I/O ports, bidirectional bus drivers with

parity, and working registers.

The ten flip-flops are edge-triggered D-type

flip-flops. On the positive transition of the clock

(CLK) input, the devices provide true data at the

Q outputs.

A buffered output-enable (OE) input can be used

to place the ten outputs in either a normal logic

state (high or low logic levels) or a high-impedance

state. In the high-impedance state, the

outputs neither load nor drive the bus lines

significantly. The high-impedance state and

increased drive provide the capability to drive bus

lines without need for interface or pullup

components.

OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can

be entered while the outputs are in the high-impedance state.

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT821 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74ABT821A is characterized for operation from –40°C to 85°C.

更新时间:2025-11-24 13:58:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI
25+
SOP
202
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TI
24+
SOIC24
199
TI
25+23+
SOP
67131
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Texas Instruments
24+
24-SOIC(0.295
56300
TI
25+
IC
2000
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TI
22+
24SOIC
9000
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TI
25+
SOIC24
4500
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TI
23+
SOP
3200
正规渠道,只有原装!
TI/德州仪器
24+
SOP
202
只供应原装正品 欢迎询价
TI
23+
SOP
5000
全新原装,支持实单,非诚勿扰