SY100S838L价格

参考价格:¥22.7027

型号:SY100S838LZG 品牌:Micrel 备注:这里有SY100S838L多少钱,2025年最近7天走势,今日出价,今日竞价,SY100S838L批发/采购报价,SY100S838L行情走势销售排行榜,SY100S838L报价。
型号 功能描述 生产厂家 企业 LOGO 操作
SY100S838L

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

文件:483.53 Kbytes Page:5 Pages

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

DESCRIPTION The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

文件:483.53 Kbytes Page:5 Pages

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

DESCRIPTION The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

DESCRIPTION The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

DESCRIPTION The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

DESCRIPTION The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

DESCRIPTION The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

DESCRIPTION The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

DESCRIPTION The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

DESCRIPTION The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

文件:483.53 Kbytes Page:5 Pages

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

文件:483.53 Kbytes Page:5 Pages

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

文件:483.53 Kbytes Page:5 Pages

Micrel

麦瑞半导体

封装/外壳:20-SOIC(0.295",7.50mm 宽) 包装:管件 描述:IC CLOCK GEN 3.3V/5V 20-SOIC 集成电路(IC) 时钟发生器,PLL,频率合成器

Microchip

微芯科技

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

文件:483.53 Kbytes Page:5 Pages

Micrel

麦瑞半导体

封装/外壳:20-SOIC(0.295",7.50mm 宽) 包装:管件 描述:IC CLOCK GEN 3.3V/5V 20-SOIC 集成电路(IC) 时钟发生器,PLL,频率合成器

Microchip

微芯科技

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

文件:483.53 Kbytes Page:5 Pages

Micrel

麦瑞半导体

(첨1, 첨2/3) OR (첨2, 첨4/6) CLOCK GENERATION CHIP

文件:483.53 Kbytes Page:5 Pages

Micrel

麦瑞半导体

SY100S838L产品属性

  • 类型

    描述

  • 型号

    SY100S838L

  • 功能描述

    IC CLOCK GEN 3.3V/5V 20-SOIC

  • RoHS

  • 类别

    集成电路(IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器

  • 系列

    Precision Edge®

  • 标准包装

    27

  • 系列

    Precision Edge®

  • 类型

    频率合成器

  • PLL

  • 输入

    PECL,晶体

  • 输出

    PECL

  • 电路数

    1 比率 -

  • 1

    1 差分 -

  • 输出

    无/是 频率 -

  • 最大

    800MHz

  • 除法器/乘法器

    是/无

  • 电源电压

    3.135 V ~ 5.25 V

  • 工作温度

    0°C ~ 85°C

  • 安装类型

    表面贴装

  • 封装/外壳

    28-SOIC(0.295,7.50mm 宽)

  • 供应商设备封装

    28-SOIC

  • 包装

    管件

更新时间:2025-11-6 11:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
MICREL/麦瑞
23+
SOP
50000
全新原装正品现货,支持订货
MicrelInc
25+23+
20-SOIC
12848
绝对原装正品全新进口深圳现货
MICREL
23+
SOIC-20
72
全新原装正品现货,支持订货
Micrel(麦瑞)
23+
NA
20094
正纳10年以上分销经验原装进口正品做服务做口碑有支持
Microchip
25+
电联咨询
7800
公司现货,提供拆样技术支持
Microchip
22+
20SOIC
9000
原厂渠道,现货配单
MICROCHIP/微芯
18+
SOIC20
6522
全新原装现货,可出样品,可开增值税发票
MICREL/麦瑞
24+
SOIC-20
5000
全新原装正品现货 假一赔十
SYNERGY
20+
SOP
2960
诚信交易大量库存现货
MICROCHIP/微芯
24+
SOIC20
9600
原装现货,优势供应,支持实单!

SY100S838L数据表相关新闻