Two Channel HD Audio CODEC

The STAC9200 is a basic 2-channel High Definition (HD) Audio CODEC for WinXP (and prior), Embedded and Linux applications. • Full Duplex Stereo 24-bit ADCs and 24-bit DACs\r\n• Integrated Headphone Amplifiers\r\n• Stereo Analog Microphone Support\r\n• SPDIF Input and Output\r\n• Mixer-less design\r\n• 48 pin QFP 7mm X 7mm or 32 pin QFN 5mm X 5mm Package Options;

200W 32V HF to 1.3GHz LDMOS transistor in STAC package

The STAC9200 is a common source N-channel enhancement-mode lateral field-effect RF power transistor designed for broadband applications in the HF to 1300 MHz frequency range. The STAC9200 benefits from the latest generation of efficient STAC® package technology.\n • Improved ruggedness: V(BR)DSS> 80 V\n• Load mismatch 65:1 all phases @ 200 W / 32 V / 860 MHz under 1 msec - 10%\n• POUT = 200 W min. (250 W typ.) with 16 dB gain @ 860 MHz• In compliance with the 2002/95/EC European directive\n• ST air-cavity STAC® packaging technology;

200 W, 32 V HF to 1.3 GHz LDMOS transistor in a STAC package

文件：449.55 Kbytes Page：14 Pages

封装/外壳：STAC244B 包装：管件 描述：200W 32V HF TO 1.3GHZ LDMOS TRAN 分立半导体产品 晶体管 - FET，MOSFET - 射频

2-CHANNEL HIGH DEFINITION AUDIO CODEC

文件：1.56149 Mbytes Page：126 Pages

2-CHANNEL HIGH DEFINITION AUDIO CODEC

文件：1.56149 Mbytes Page：126 Pages

2-CHANNEL HIGH DEFINITION AUDIO CODEC

文件：1.56149 Mbytes Page：126 Pages

2-CHANNEL HIGH DEFINITION AUDIO CODEC

文件：1.56149 Mbytes Page：126 Pages

2-CHANNEL HIGH DEFINITION AUDIO CODEC

2-CHANNEL HIGH DEFINITION AUDIO CODEC

文件：1.56149 Mbytes Page：126 Pages

2-CHANNEL HIGH DEFINITION AUDIO CODEC

文件：1.56149 Mbytes Page：126 Pages

2-CHANNEL HIGH DEFINITION AUDIO CODEC

文件：1.56149 Mbytes Page：126 Pages

2-CHANNEL HIGH DEFINITION AUDIO CODEC

文件：1.56149 Mbytes Page：126 Pages

2-CHANNEL HIGH DEFINITION AUDIO CODEC

文件：1.56149 Mbytes Page：126 Pages

封装/外壳：48-LQFP 包装：卷带（TR） 描述：2 CHANNEL HDA CODEC, 5V, 100DB 4 集成电路（IC） 编解码器

Complete 10-Bit, 20 MSPS, 80 mW CMOS A/D Converter

PRODUCT DESCRIPTION The AD9200 is a monolithic, single supply, 10-bit, 20 MSPS analog-to-digital converter with an on-chip sample-and-hold amplifier and voltage reference. The AD9200 uses a multistage differential pipeline architecture at 20 MSPS data rates and guarantees no missing codes over th

Ultra fast high-voltage soft-recovery controlled avalanche rectifier

DESCRIPTION Plastic package, using glass passivation and a high temperature alloyed construction. This package is hermetically sealed and fatigue free as coefficients of expansion of all used parts are matched. The package should be used in an insulating medium such as resin, oil or SF6 g

Analog Signal Processors for Compact Disc Players

Analog Signal Processors for Compact Disc Players

CAN Bus Driver and Receiver

DESCRIPTION The Si9200EY is designed to interface between the Intel 82526 CAN controller and the physical bus to provide drive capability to the bus and differential receive capability to the controller. It is designed to absorb typical electrical transients on the bus which may occur in an aut

CAN Bus Driver and Receiver

DESCRIPTION The Si9200EY is designed to interface between the Intel 82526 CAN controller and the physical bus to provide drive capability to the bus and differential receive capability to the controller. It is designed to absorb typical electrical transients on the bus which may occur in an aut