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SN74ALVCH16841价格
参考价格：￥16.9513
型号：SN74ALVCH16841DGGR 品牌：TI 备注：这里有SN74ALVCH16841多少钱，2025年最近7天走势，今日出价，今日竞价，SN74ALVCH16841批发/采购报价，SN74ALVCH16841行情走势销售排行榜，SN74ALVCH16841报价。| 型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74ALVCH16841 | 20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS 文件：132.6 Kbytes Page：10 Pages | TI 德州仪器 |   | |
SN74ALVCH16841 | 20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS 文件：348.57 Kbytes Page：15 Pages | TI1 德州仪器 | | |
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17 | TI2 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17 | TI2 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17 | TI2 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17 | TI2 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17 | TI2 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17 | TI2 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17 | TI2 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17 | TI2 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS FEATURES · Member of the Texas Instruments Widebus™ Family · EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process · ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) · Latch-Up Performance Exceeds 250 mA Per JESD 17 | TI2 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS 文件：348.57 Kbytes Page：15 Pages | TI1 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS 文件：132.6 Kbytes Page：10 Pages | TI 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS 文件：348.57 Kbytes Page：15 Pages | TI1 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS 文件：348.57 Kbytes Page：15 Pages | TI1 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS 文件：348.57 Kbytes Page：15 Pages | TI1 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS 文件：132.6 Kbytes Page：10 Pages | TI 德州仪器 | | ||
封装/外壳：56-BSSOP（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUS-INTERFACE LATCH 56-SSOP 集成电路（IC） 锁存器 | TI2 德州仪器 | | ||
封装/外壳：56-BSSOP（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC LATCH BUS 20BIT D 3ST 56-SSOP 集成电路（IC） 锁存器 | TI2 德州仪器 | | ||
20-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS 文件：348.57 Kbytes Page：15 Pages | TI1 德州仪器 | | ||
20-bit bus interface D-type latch 3-State DESCRIPTION The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates. FEATUR | Philips 飞利浦 | | ||
20-bit bus interface D-type latch; 3-state 1. General description The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates. | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | | ||
20-bit bus interface D-type latch; 3-state 1. General description The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates. | NEXPERIANexperia B.V. All rights reserved 安世安世半导体(中国)有限公司 | | ||
20-bit bus interface D-type latch 3-State DESCRIPTION The 74ALVCH16841 has two 10-bit D-type latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. The two sections of each register are controlled independently by the latch enable (nLE) and output enable (nOE) control gates. FEATUR | Philips 飞利浦 | |
SN74ALVCH16841产品属性
- 类型
描述
- 型号
SN74ALVCH16841
- 功能描述
闭锁 20bit Bus Interface
- RoHS
否
- 制造商
Micrel
- 电路数量
1
- 逻辑类型
CMOS
- 逻辑系列
TTL
- 极性
Non-Inverting
- 输出线路数量
9
- 电源电压-最大
12 V
- 电源电压-最小
5 V
- 最大工作温度
+ 85 C
- 最小工作温度
- 40 C
- 封装/箱体
SOIC-16
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI |
20+ |
NA |
53650 |
TI原装主营-可开原型号增税票 |
|||
TI(德州仪器) |
24+ |
标准封装 |
7778 |
原厂直销,大量现货库存,交期快。价格优,支持账期 |
|||
TI/德州仪器 |
25+ |
SSOP-56 |
65428 |
百分百原装现货 实单必成 |
|||
TI(德州仪器) |
2024+ |
SSOP-56-300mil |
500000 |
诚信服务,绝对原装原盘 |
|||
SN74ALVCH16841DGGR |
1970 |
1970 |
|||||
TI |
25+ |
TSSOP56 |
4500 |
全新原装、诚信经营、公司现货销售! |
|||
TI |
02+ |
SSOP-56 |
6000 |
绝对原装自己现货 |
|||
TI/德州仪器 |
25+ |
原厂封装 |
10280 |
原厂授权代理,专注军工、汽车、医疗、工业、新能源！ |
|||
TI |
24+ |
SSOP56 |
453 |
只做原装，欢迎询价，量大价优 |
|||
TI |
24+ |
SSOP|56 |
451000 |
免费送样原盒原包现货一手渠道联系 |
SN74ALVCH16841芯片相关品牌
SN74ALVCH16841规格书下载地址
SN74ALVCH16841参数引脚图相关
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- SN74ALVCH16952DL
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- SN74ALVCH16835DGVR
- SN74ALVCH16835DGGR
- SN74ALVCH16832DGGR
- SN74ALVCH16827DL
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- SN74ALVCH16825DL
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- SN74ALVCH16823DLR
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- SN74ALVCH16821DGGR
- SN74ALVCH16820DLR
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- SN74ALVCH16721DLR
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- SN74ALVCH16646DLR
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- SN74ALVCH16646DGVR
- SN74ALS
- SN74AHC
- SN74AC
- SN74ABT
- SN7497N
- SN7497
- SN7496N
- SN7496
- SN7495A
- SN7494N
- SN7494
- SN7493A
- SN7492A
- SN7491A
- SN7490A
- SN7489N
- SN7489J
- SN7489
- SN7488A
- SN7486N
SN74ALVCH16841数据表相关新闻
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