SI5311价格
参考价格：￥20.6228
型号：SI53112-A00AGM 品牌：Silicon Labs 备注：这里有SI5311多少钱，2026年最近7天走势，今日出价，今日竞价，SI5311批发/采购报价，SI5311行情走势销售排行榜，SI5311报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SI5311 | PRECISION HIGH SPEED CLOCK MULTIPLIER/REGENERATOR IC 文件：513.2 Kbytes Page：24 Pages | ETCList of Unclassifed Manufacturers 未分类制造商 |   | |
SI5311 | PRECISION HIGH SPEED CLOCK MULTIPLIER/REGENERATOR IC | TELEGESIS | | |
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresse | SKYWORKS 思佳讯 | | ||
15-OUTPUT PCIE GEN3 BUFFER / ZERO-DELAY BUFFER Features Fifteen 0.7 V low-power, pushpull HCSL PCIe Gen3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers in | SKYWORKS 思佳讯 | | ||
15-OUTPUT PCIE GEN3 BUFFER / ZERO-DELAY BUFFER Features Fifteen 0.7 V low-power, pushpull HCSL PCIe Gen3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers in | SKYWORKS 思佳讯 | | ||
15-OUTPUT PCIE GEN3 BUFFER / ZERO-DELAY BUFFER Features Fifteen 0.7 V low-power, pushpull HCSL PCIe Gen3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers in | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
PCIe Fanout/Zero-Delay Buffer The Si53119 is a 1 : 19 PCIe Fanout/Zero-Delay Buffer that meets all of the performance requirements of the Intel DB1900Z specification. The device is optimized for distributing 19 reference clocks for Intel® QuickPath Interconnect (Intel QPI), PCIe Gen 1/Gen 2/ Gen 3, SAS, SATA and Intel Scalable | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
19-OUTPUT PCIE GEN 3 BUFFER Features Nineteen 0.7 V low-power, pushpull HCSL PCIe Gen 3 outputs 100 MHz /133 MHz PLL operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch value from HW pin 9 selectable SMBUS addresses SMBus address configurable to allow multiple buffers | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER 文件：1.46181 Mbytes Page：35 Pages | SILABS 芯科科技 | | ||
封装/外壳：64-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC BUFFER ZDB PCIE 1:12 64-QFN 集成电路（IC） 应用特定时钟/定时 | SKYWORKS 思佳讯 | | ||
DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER 文件：1.43783 Mbytes Page：34 Pages | SILABS 芯科科技 | | ||
封装/外壳：64-VFQFN 裸露焊盘 包装：管件 描述：1:12 LOW-POWER PCIE FANOUT/ZERO- 集成电路（IC） 应用特定时钟/定时 | SKYWORKS 思佳讯 | | ||
15-OUTPUT PCIE GEN3 BUFFER/ ZERO DELAY BUFFER 文件：1.38477 Mbytes Page：33 Pages | SILABS 芯科科技 | | ||
19-OUTPUT PCIE GEN 3 BUFFER 文件：1.42694 Mbytes Page：35 Pages | SILABS 芯科科技 | | ||
PLL or bypass mode 文件：1.4135 Mbytes Page：34 Pages | SILABS 芯科科技 | | ||
PLL or bypass mode 文件：1.4135 Mbytes Page：34 Pages | SILABS 芯科科技 | | ||
PLL or bypass mode 文件：1.4135 Mbytes Page：34 Pages | SILABS 芯科科技 | | ||
Precision high speed clock multiplier/regenerator IC. | TELEGESIS | | ||
PRECISION HIGH SPEED CLOCK MULTIPLIER/REGENERATOR IC 文件：513.2 Kbytes Page：24 Pages | ETCList of Unclassifed Manufacturers 未分类制造商 | | ||
Colorless transparency lens type 文件：221.91 Kbytes Page：4 Pages | KODENSHI 可天士 | | ||
IRED 文件：202.78 Kbytes Page：4 Pages | AUK | | ||
IRED 文件：202.78 Kbytes Page：4 Pages | AUK | | ||
2.5 V to 5.5 V, 500 uA, Parallel Interface Quad Voltage-Output 8-/10-/12-Bit DACs GENERAL DESCRIPTION The AD5334/AD5335/AD5336/AD5344 are quad 8-, 10-, and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 500 µA at 3 V, and feature a power-down mode that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can drive | AD 亚德诺 | | ||
Power supply unit for LCD drives Power supply unit for LCD drives The BP5311 is a DC-DC converter unit for supplying power to liquid crystal display (LCD) panels. The unit supplies a positive voltage for LCDs from a logic circuit power supply (+5V) Features 1) High conversion efficiency. 2) Built-in protection circuit. 3) Bu | ROHM 罗姆 | | ||
Variable Drivided Voltage Generator for LCD Overview The LA5311M is a variable divided voltage generator IC for multiple drive of LCD matrix. Features • Power supply for variable bias LCD drive. • 4 operational amplifiers deliver 4 voltage outputs. • Low current drain (1.0mA max). • Miniflat package. | SANYO 三洋 | | ||
Dual Bias Resistor Transistors Dual Bias Resistor Transistors NPN and PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. Thes | MOTOROLA 摩托罗拉 | | ||
Single Phase Bridge Rectifier 4 Amp Features: ● Ideal for Printed Circuit Board ● Surge Overload Rating: 200A (Peak) | NTE | |
SI5311产品属性
- 类型
描述
- Temperature Range Min (°C)：
-40
- Package Type：
QFN64
- OPN：
Si53112-A00AGM
- Line Impedance Match：
0
- Universal Buffers：
false
- Number of Inputs：
1
- Number of Outputs：
12
- Frequency Max：
133
- Frequency Min (MHz)：
100
- Package Size (mm)：
9x9
- Description：
PCle Fan-out/Zero-Delay Buffer
- VDDO (V)：
3.3
- Ouput Format(s)：
HCSL
- Additive Jitter (ps RMS)：
0.08
- VDD (V)：
3.3
- PCIe Compliant：
true
- Feedback Path：
false
- Output Format Categories：
Differential
- Single Ended Input：
false
- LVCMOS Buffers：
false
- Differential Buffers：
false
- Temperature Range Max (°C)：
85
- Dual：
false
- Zero Delay Buffers：
true
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
SILICON/芯科 |
25+ |
QFN64 |
90000 |
全新原装现货 |
|||
Silicon Labs/芯科 |
1534+ |
QFN |
71 |
全新、原装、深圳、现货 |
|||
SILICON LABS |
23+ |
QFN |
315 |
全新原装正品现货,支持订货 |
|||
SKYWORKS |
24+ |
QFN |
32500 |
SKYWORKS/SILICON lora物联网芯片 |
|||
SILICON LABS(芯科) |
2511 |
标准封装 |
4000 |
电子元器件采购降本30%!原厂直采,砍掉中间差价 |
|||
Silicon Labs |
21+ |
SOT-89 |
260 |
只做原装鄙视假货15118075546 |
|||
SILICON |
23+ |
QFN |
50000 |
全新原装正品现货,支持订货 |
|||
SILICON LABS(芯科) |
26+ |
QFN-64(9x9) |
10548 |
原厂订货渠道,支持账期,一站式服务! |
|||
SILICOM |
23+ |
QFN |
3000 |
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、 |
|||
26+ |
N/A |
64000 |
一级代理-主营优势-实惠价格-不悔选择 |
SI5311规格书下载地址
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DdatasheetPDF页码索引
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