Super high dense cell design for low RDS(ON).

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Super high dense cell design for low RDS(ON).

Super high dense cell design for low RDS(ON).

N-Channel MOSFET uses advanced trench technology

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Super high dense cell design for low RDS(ON).

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N-Channel 650V (D-S) Power MOSFET

FEATURES • Low figure-of-merit (FOM) Ron x Qg • Low input capacitance (Ciss) • Reduced switching and conduction losses • Ultra low gate charge (Qg) • Avalanche energy rated (UIS) APPLICATIONS • Server and telecom power supplies • Switch mode power supplies (SMPS) • Power factor correcti

N?륝hannel Logic Level Enhancement Mode Field Effect Transistor

Product Summary: BVDSS 500V RDSON (MAX.) 1.3Ω ID 7A UIS, 100 Tested Pb‐Free Lead Plating

N?륝hannel Logic Level Enhancement Mode Field Effect Transistor

Product Summary: BVDSS 500V RDSON (MAX.) 1.3Ω ID 7A UIS, 100 Tested Pb‐Free Lead Plating

isc N-Channel MOSFET Transistor

FEATURES ·Drain Current –ID=6.5A@ TC=25℃ ·Drain Source Voltage- : VDSS=500V(Min) ·Static Drain-Source On-Resistance : RDS(on) = 0.85Ω(Max)@VGS= 10V ·100 avalanche tested ·Minimum Lot-to-Lot variations for robust device performance and reliable operation DESCRIPTION ·motor drive, DC-DC co

N-CHANNEL SILICON POWER MOSFET

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