Cost-Effective, 2A Sink/Source Bus Termination Regulator

General Description The RT9173C is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ

封装/外壳：8-SOIC（0.154"，3.90mm 宽）裸露焊盘 包装：管件 描述：IC REG 2A BUS TERMINATION PSOP8 集成电路（IC） 特殊用途稳压器

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