Evaluation Board Manual

Features ■ Crystal or Crystal overdrive (REFIN) via SMA ■ Available sense lines on Crystal Overdrive and CLKIN ■ Onboard I2C and SPI communications ■ Four GPIs and five GPIOs ■ GPI/GPIO LED indicator and DIP switch ■ Test points on outputs for Hi-Z probes ■ Jumper selectable voltage setting

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

VersaClock 7 Programmable Clock Generator Family

Features ▪ 169fs RMS phase jitter (10kHz - 20MHz, 156.25MHz) ▪ PCIe® Gen6 Common Clock (CC) 27fs RMS ▪ PCIe SRIS and SRNS support ▪ 1kHz to 650MHz LVDS/LP-HCSL outputs ▪ 1kHz to 200MHz LVCMOS outputs ▪ Simple AC-coupling to LVPECL and CML ▪ LP-HCSL integrates 100 or 85 terminations ▪ Pr

包装：卷带（TR） 描述：IC CLOCK JITTER PCIE 40VFQFPN 集成电路（IC） 时钟发生器，PLL，频率合成器

包装：管件 描述：VC7 - 8 OUTPUTS - CLOCKGEN GENER 集成电路（IC） 时钟发生器，PLL，频率合成器

Evaluation Board Manual

Features ■ Crystal or Crystal overdrive (REFIN) via SMA ■ Available sense lines on Crystal Overdrive and CLKIN ■ Onboard I2C and SPI communications ■ Four GPIs and five GPIOs ■ GPI/GPIO LED indicator and DIP switch ■ Test points on outputs for Hi-Z probes ■ Jumper selectable voltage setting

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