LOW PHASE NOISE T1/E1 CLOCK GENERATOR

Features • Generates a T1 (1.544 MHz) or E1 (2.048 MHz) output clock from an 8kHz frame clock input • Configurable jitter attenuation characteristics, excellent for use as a Stratum source de-jitter circuit • VCXO-based clock generation ensures very low jitter and phase noise generation • O

LOW PHASE NOISE T1/E1 CLOCK GENERATOR

文件：229.94 Kbytes Page：11 Pages

LOW PHASE NOISE T1/E1 CLOCK GENERATOR

Features • Generates a T1 (1.544 MHz) or E1 (2.048 MHz) output clock from an 8kHz frame clock input • Configurable jitter attenuation characteristics, excellent for use as a Stratum source de-jitter circuit • VCXO-based clock generation ensures very low jitter and phase noise generation • O

LOW PHASE NOISE T1/E1 CLOCK GENERATOR

Features • Generates a T1 (1.544 MHz) or E1 (2.048 MHz) output clock from an 8kHz frame clock input • Configurable jitter attenuation characteristics, excellent for use as a Stratum source de-jitter circuit • VCXO-based clock generation ensures very low jitter and phase noise generation • O

LOW PHASE NOISE T1/E1 CLOCK GENERATOR

文件：229.94 Kbytes Page：11 Pages

LOW PHASE NOISE T1/E1 CLOCK GENERATOR

文件：229.94 Kbytes Page：11 Pages

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC CLK GENERATOR T1/E1 16-TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

LOW PHASE NOISE T1/E1 CLOCK GENERATOR

文件：229.94 Kbytes Page：11 Pages

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC CLK GENERATOR T1/E1 16-TSSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

LOW PHASE NOISE T1/E1 CLOCK GENERATOR

文件：229.94 Kbytes Page：11 Pages