8-Bit Serial or Parallel- Input/Serial-Output Shift Register

The MC74HC597A is identical in pinout to the LS597. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of an 8−bit input latch which feeds parallel data to an 8−bit shift register. Data can also be loade

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 功能：并行或串行至串行 包装：管件 描述：IC SHIFT REGISTER 8BIT 16TSSOP 集成电路（IC） 移位寄存器

8-bit shift register with input flip-flops

1. General description The 74HC597; 74HCT597 is an 8-bit shift register with input flip-flops. It consists of an 8-bit storage register feeding a parallel-in, serial-out 8-bit shift register. Both the storage register and the shift register have positive edge-triggered clocks. The shift registe

8-bit shift register with input flip-flops

GENERAL DESCRIPTION The 74HC/HCT597 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 8-bit parallel storage register inputs • Shift register has direct overriding lo

8-bit shift register with input flip-flops

GENERAL DESCRIPTION The 74HC/HCT597 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 8-bit parallel storage register inputs • Shift register has direct overriding lo

8-bit shift register with input flip-flops

1. General description The 74HC597; 74HCT597 is an 8-bit shift register with input flip-flops. It consists of an 8-bit storage register feeding a parallel-in, serial-out 8-bit shift register. Both the storage register and the shift register have positive edge-triggered clocks. The shift registe

8-bit shift register with input flip-flops

GENERAL DESCRIPTION The 74HC/HCT597 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 8-bit parallel storage register inputs • Shift register has direct overriding lo