LMG342xR050 600V 50mΩ GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600V GaN-on-Si FET with integrated gate driver – Integrated high precision gate bias voltage – 200V/ns FET hold-off – 3.6MHz switching frequency – 20V/ns to 150V/ns slew rate for optimization of switching performance a

LMG342xR050 600-V 50-m廓 GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600-V GaN-on-Si FET with Integrated gate driver – Integrated high precision gate bias voltage – 200-V/ns CMTI – 3.6-MHz switching frequency – 20-V/ns to 150-V/ns slew rate for optimization of switching performance and

LMG342xR050 600V 50mΩ GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600V GaN-on-Si FET with integrated gate driver – Integrated high precision gate bias voltage – 200V/ns FET hold-off – 3.6MHz switching frequency – 20V/ns to 150V/ns slew rate for optimization of switching performance a

LMG342xR050 600-V 50-m廓 GaN FET with Integrated Driver, Protection, and Temperature Reporting

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LMG342xR050 600-V 50-m廓 GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600-V GaN-on-Si FET with Integrated gate driver – Integrated high precision gate bias voltage – 200-V/ns CMTI – 3.6-MHz switching frequency – 20-V/ns to 150-V/ns slew rate for optimization of switching performance and

LMG342xR050 600V 50mΩ GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600V GaN-on-Si FET with integrated gate driver – Integrated high precision gate bias voltage – 200V/ns FET hold-off – 3.6MHz switching frequency – 20V/ns to 150V/ns slew rate for optimization of switching performance a

LMG342xR050 600V 50mΩ GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600V GaN-on-Si FET with integrated gate driver – Integrated high precision gate bias voltage – 200V/ns FET hold-off – 3.6MHz switching frequency – 20V/ns to 150V/ns slew rate for optimization of switching performance a

LMG342xR050 600V 50mΩ GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600V GaN-on-Si FET with integrated gate driver – Integrated high precision gate bias voltage – 200V/ns FET hold-off – 3.6MHz switching frequency – 20V/ns to 150V/ns slew rate for optimization of switching performance a

LMG342xR050 600V 50mΩ GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600V GaN-on-Si FET with integrated gate driver – Integrated high precision gate bias voltage – 200V/ns FET hold-off – 3.6MHz switching frequency – 20V/ns to 150V/ns slew rate for optimization of switching performance a

LMG342xR050 600V 50mΩ GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600V GaN-on-Si FET with integrated gate driver – Integrated high precision gate bias voltage – 200V/ns FET hold-off – 3.6MHz switching frequency – 20V/ns to 150V/ns slew rate for optimization of switching performance a

LMG342xR050 600V 50mΩ GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600V GaN-on-Si FET with integrated gate driver – Integrated high precision gate bias voltage – 200V/ns FET hold-off – 3.6MHz switching frequency – 20V/ns to 150V/ns slew rate for optimization of switching performance a

LMG342xR050 600-V 50-m廓 GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600-V GaN-on-Si FET with Integrated gate driver – Integrated high precision gate bias voltage – 200-V/ns CMTI – 3.6-MHz switching frequency – 20-V/ns to 150-V/ns slew rate for optimization of switching performance and

LMG342xR050 600V 50mΩ GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600V GaN-on-Si FET with integrated gate driver – Integrated high precision gate bias voltage – 200V/ns FET hold-off – 3.6MHz switching frequency – 20V/ns to 150V/ns slew rate for optimization of switching performance a

LMG342xR050 600V 50mΩ GaN FET With Integrated Driver, Protection, and Temperature Reporting

1 Features • Qualified for JEDEC JEP180 for hard-switching topologies • 600V GaN-on-Si FET with integrated gate driver – Integrated high precision gate bias voltage – 200V/ns FET hold-off – 3.6MHz switching frequency – 20V/ns to 150V/ns slew rate for optimization of switching performance a

封装/外壳：54-VQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：600-V 50-M GAN FET WITH INTEGRAT 集成电路（IC） 全半桥驱动器

封装/外壳：54-VQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：600-V 50-M GAN FET WITH INTEGRAT 集成电路（IC） 全半桥驱动器