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位置：首页 > IC中文资料第7008页 > K4H510438D

型号 功能描述 生产厂家 企业 LOGO 操作
K4H510438D

512Mb D-die DDR SDRAM Specification

Key Features • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR266, 333 • VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400 • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16) • Four banks operation • Dif

SAMSUNG

三星

K4H510438D

DDR SDRAM Product Guide

Consumer Memory

SAMSUNG

三星

K4H510438D

512Mb D-die DDR SDRAM Specification

SAMSUNG

三星

K4H510438

512Mb B-die DDR SDRAM Specification

Key Features • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR266, 333 • VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400 • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16) • Four banks operation • Differential cl

SAMSUNG

三星

K4H510438D-TCA0

128Mb DDR SDRAM

Features • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • MRS cycle with address key programs -. Read latency 2, 2.5 (

SAMSUNG

三星

K4H510438D-TCA2

128Mb DDR SDRAM

Features • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • MRS cycle with address key programs -. Read latency 2, 2.5 (

SAMSUNG

三星

K4H510438D-TCB0

128Mb DDR SDRAM

Features • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • MRS cycle with address key programs -. Read latency 2, 2.5 (

SAMSUNG

三星

K4H510438D-TLA0

128Mb DDR SDRAM

Features • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • MRS cycle with address key programs -. Read latency 2, 2.5 (

SAMSUNG

三星

K4H510438D-TLA2

128Mb DDR SDRAM

Features • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • MRS cycle with address key programs -. Read latency 2, 2.5 (

SAMSUNG

三星

K4H510438D-TLB0

128Mb DDR SDRAM

Features • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe(DQS) • Four banks operation • Differential clock inputs(CK and CK) • DLL aligns DQ and DQS transition with CK transition • MRS cycle with address key programs -. Read latency 2, 2.5 (

SAMSUNG

三星

K4H510438D-UC/LA2

512Mb D-die DDR SDRAM Specification

Key Features • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR266, 333 • VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400 • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16) • Four banks operation • Dif

SAMSUNG

三星

K4H510438D-UC/LB0

512Mb D-die DDR SDRAM Specification

Key Features • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR266, 333 • VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400 • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16) • Four banks operation • Dif

SAMSUNG

三星

K4H510438D-UCSLASHLA2

512Mb D-die DDR SDRAM Specification

Key Features • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR266, 333 • VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400 • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16) • Four banks operation • Dif

SAMSUNG

三星

K4H510438D-UCSLASHLB0

512Mb D-die DDR SDRAM Specification

Key Features • VDD : 2.5V ± 0.2V, VDDQ : 2.5V ± 0.2V for DDR266, 333 • VDD : 2.6V ± 0.1V, VDDQ : 2.6V ± 0.1V for DDR400 • Double-data-rate architecture; two data transfers per clock cycle • Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16) • Four banks operation • Dif

SAMSUNG

三星

K4H510438B-GC/LCC

512Mb B-die DDR SDRAM Specification

文件：392.89 Kbytes Page：24 Pages

SAMSUNG

三星

K4H510438B-GCSLASHLCC

512Mb B-die DDR SDRAM Specification

文件：392.89 Kbytes Page：24 Pages

SAMSUNG

三星

K4H510438B-ZC/LCC

512Mb B-die DDR SDRAM Specification

文件：392.89 Kbytes Page：24 Pages

SAMSUNG

三星

K4H510438B-ZCSLASHLCC

512Mb B-die DDR SDRAM Specification

文件：392.89 Kbytes Page：24 Pages

SAMSUNG

三星

K4H510438D产品属性

  • 类型

    描述

  • 型号

    K4H510438D

  • 制造商

    SAMSUNG

  • 制造商全称

    Samsung semiconductor

  • 功能描述

    DDR SDRAM Product Guide

K4H510438D供应商更多...

更新时间：2026-1-28 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
深圳市高捷芯城科技有限公司
K4H510438D-UCB3
SAMSUNG(三星)
25+
N/A
21000
原装正品现货,原厂订货,可支持含税原型号开票。
询价
深圳诚思涵科技有限公司
K4H510438D-ZCCC
SAMSUNG/三星
24+
BGA
13718
只做原装 公司现货库存
询价
深圳市威雅利发展有限公司
K4H510438D-UCB3
SAMSUNG
0831+
TSOP66
280
一级代理,专注军工、汽车、医疗、工业、新能源、电力
询价
深圳市科芯源微电子有限公司
K4H510438D-ZCCC
SAMSUNG/三星
2026+
BGA
996880
只做原装,欢迎来电资询
询价
深圳市华睿芯科技有限公司
K4H510438D-UCBO
SAMSUNG
24+
TSSOP
20000
全新原厂原装，进口正品现货，正规渠道可含税！！
询价
深圳市得捷芯城科技有限公司
K4H510438D-UCB3
SAMSUNG(三星)
25+
N/A
21000
原装正品现货,原厂订货,可支持含税原型号开票。
询价
深圳市凯睿晟科技有限公司
K4H510438D-ZCCC
SAMSUNG
2024+
FBGA
38
凯睿晟只做原装正品 实单可谈!
询价
深圳市英卓尔科技有限公司
K4H510438D-UCB3
SAMSUNG
20+
TSSOP66
2960
诚信交易大量库存现货
询价
深圳市华斯顿科技有限公司
K4H510438D-UCB3
SAMSUNG
25+23+
TSSOP66
36634
绝对原装正品全新进口深圳现货
询价
深圳市云美电子科技有限公司
K4H510438D-ZCB3
SAMSUNG/三星
24+
BGA100
29954
只做原装进口现货
询价

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