位置：首页 > IC中文资料第1220页 > ISPLSI5384
| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
In-System Programmable 3.3V SuperWIDE™ High Density PLD Features • Second Generation SuperWIDE HIGH DENSITY IN-SYSTEM PROGRAMMABLE LOGIC DEVICE — 3.3V Power Supply — User Selectable 3.3V/2.5V I/O — 24000 PLD Gates / 512 Macrocells — Up to 256 I/O Pins — 512 Registers — High-Speed Global Interconnect — SuperWIDE Generic Logic Block (32 Macrocel | Lattice 莱迪思 |   | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD ispLSI 5000VE Description The ispLSI 5000VE Family of In-System Programmable High Density Logic Devices is based on Generic Logic Blocks (GLBs) of 32 registered macrocells and a single Global Routing Pool (GRP) structure interconnecting the GLBs. Outputs from the GLBs drive the Global Routing Po | Lattice 莱迪思 | | ||
In System Programmable 3.3V SuperWIDE High Density PLD | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：311.1 Kbytes Page：31 Pages | Lattice 莱迪思 | | ||
In-System Programmable 3.3V SuperWIDE™ High Density PLD | Lattice 莱迪思 | | ||
40-Channel, 3 V/5 V, Single-Supply, Serial, 14-Bit Voltage Output DAC GENERAL DESCRIPTION The AD5384 is a complete single-supply, 40-channel, 14-bit digital-to-analog converter (DAC) available in a 100-ball CSP_BGA package. All 40 channels have an on-chip output amplifier with rail-to-rail operation. The AD5384 includes an internal 1.25 V/2.5 V, 10 ppm/°C reference | AD 亚德诺 | | ||
107 DB 24 BIT 96KHZ 4 CHANNEL ADC GENERAL DESCRIPTION The AK5384 is a 4-channel A/D Converter with wide sampling rate of 8kHz ~ 96kHz and is suitable for Multi-channel audio system. The AK5384 achieves high accuracy and low cost by using Enhanced dual bit DS techniques. The AK5384 supports master mode and TDM format. Therefore, | AKM 旭化成微电子 | | ||
18 (16/30) AWG Tinned Copper 文件：411.82 Kbytes Page：4 Pages | ALPHAWIRE | | ||
In-System Programmable 3.3V SuperWIDE??High Density PLD 文件：350.68 Kbytes Page：28 Pages | Lattice 莱迪思 | | ||
24bit 96kHz 4ch A/D converter 文件：269.85 Kbytes Page：23 Pages | AKM 旭化成微电子 | |
ISPLSI5384产品属性
- 类型
描述
- 型号
ISPLSI5384
- 功能描述
CPLD - 复杂可编程逻辑器件
- RoHS
否
- 制造商
Lattice
- 存储类型
EEPROM
- 大电池数量
128
- 最大工作频率
333 MHz
- 延迟时间
2.7 ns
- 可编程输入/输出端数量
64
- 工作电源电压
3.3 V
- 最大工作温度
+ 90 C
- 最小工作温度
0 C
- 封装/箱体
TQFP-100
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
23+ |
BGA256 |
10000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
||||
LATTICE |
25+ |
QFP |
18000 |
原厂直接发货进口原装 |
|||
LATTICE |
24+ |
BGA |
3 |
||||
LATTICE |
23+ |
BGA256 |
8000 |
只做原装现货 |
|||
LATTICE |
23+ |
BGA256 |
7000 |
||||
LatticeSemiconductorCorp |
24+ |
256-FPBGA(17x17) |
66800 |
原厂授权一级代理,专注汽车、医疗、工业、新能源！ |
|||
Lattice Semiconductor Corporat |
23+ |
256-BGA |
11200 |
主营:汽车电子,停产物料,军工IC |
|||
LATTICE |
23+ |
51151 |
##公司主营品牌长期供应100%原装现货可含税提供技术 |
||||
LATTICE/莱迪斯 |
2022+ |
BGA |
1500 |
原厂代理 终端免费提供样品 |
|||
LATTICE/莱迪斯 |
21+ |
BGA |
20000 |
百域芯优势 实单必成 可开13点增值税发票 |
ISPLSI5384芯片相关品牌
ISPLSI5384规格书下载地址
ISPLSI5384参数引脚图相关
- l234
- l101
- l100
- ku波段
- kt250
- kse13005
- ks20
- km710
- ka5q1265rf
- k9f1208
- k310
- k2698
- k233
- k2055
- k2010
- jumper
- jtag接口
- jk触发器
- j111
- j108
- ISTS300
- ISTS250
- ISTS200
- ISTS150
- ISTS149
- ISTS100
- IS-T-F
- IST3028
- ISS-8
- ISS-6
- ISRL860
- ISR860
- ISR820
- ISQ74X
- ISQ74
- ISQ204
- ISQ203
- ISQ202
- ISQ201
- ISPXPGA
- ISPLSI5384VE-125LB272I
- ISPLSI5384VE-125LB272
- ISPLSI5384VE-100LF256I
- ISPLSI5384VE-100LF256
- ISPLSI5384VE-100LB272I
- ISPLSI5384VE-100LB272
- ISPLSI5384VA-70LQ208
- ISPLSI5384VA-70LB388I
- ISPLSI5384VA-70LB388
- ISPLSI5384VA-70LB272I
- ISPLSI5384VA-70LB272
- ISPLSI5384VA-70LB208
- ISPLSI5384VA-125LQ208
- ISPLSI5384VA-125LB388
- ISPLSI5384VA-125LB272
- ISPLSI5384VA-125LB208
- ISPLSI5384VA-100LQ208
- ISPLSI5384VA-100LB388
- ISPLSI5384VA-100LB272
- ISPLSI5384VA-100LB208
- ISPLSI5256VE-80LT128I
- ISPLSI5256VE-80LT100I
- ISPLSI5256VE-80LF256I
- ISPLSI5256VE-80LB272I
- ISPLSI5256VE-165LT128
- ISPLSI5256VE-165LT100
- ISPLSI5256VE-165LF256
- ISPLSI5256VE-165LB272
- ISPLSI5256VE-125LT128I
- ISPLSI5256VE-125LT128
- ISPLSI5256VE-125LT100I
- ISPLSI5256VE-125LT100
- ISPLSI5256VE-125LF256I
- ISPLSI5256VE-125LF256
- ISPLSI5256VE-125LB272I
- ISPLSI5256VE-125LB272
- ISPLSI5256VE-100LT128I
- ISPLSI5256VE-100LT128
- ISPLSI5256VE-100LT100I
- ISPLSI5256VE-100LT100
- ISPICR1
- ISPGDX2
- ISPGDX
- ISPD65
- ISPD64
- ISPD63
- ISPD62
- ISPD61
- ISPD60
- ISPB40
- ISPB35
- ISPB20
- ISPA60
- ISPA40
- ISPA20
- ISPA06
- ISP847X
- ISP847
- ISP845X
- ISP845
ISPLSI5384数据表相关新闻
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ISPLSI2096V-80LT128 本公司具备一般纳税人，可开13点增值税票， 货源渠道保证原厂原装正品IC，诚信为本，薄利多销。
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瀚佳科技： 专业销售集成电路IC.单片.内存闪存.二三级管模块等电子元器件.欢迎询价购买。
2018-12-28
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