1.35V DDR3L SDRAM

·Bidirectional differential data strobe\n·Data masking per byte on Write commands\n·Programmable burst length of 4 or 8\n·Programmable CAS Latency\n·Auto-Refresh and Self-Refresh Modes\n·OCD (Driver Adjustment)\n·ODT (On Die Termination) supported\n·Write Leveling\n·Long-term support\n

Programmable CAS Latency

文件：3.89952 Mbytes Page：88 Pages

封装/外壳：96-TFBGA 包装：卷带（TR） 描述：IC DRAM 1GBIT PARALLEL 96TWBGA 集成电路（IC） 存储器

封装/外壳：96-TFBGA 包装：卷带（TR） 描述：IC DRAM 1GBIT PARALLEL 96TWBGA 集成电路（IC） 存储器

128MX8, 64MX16 1Gb DDR3 SDRAM

FEATURES ● Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V ● High speed data transfer rates with system frequency up to 933 MHz ● 8 internal banks for concurrent operation ● 8Bits pre-fetch architecture ● Programmable CAS Latency: 5

128MX8, 64MX16 1Gb DDR3 SDRAM

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • High speed data transfer rates with system frequency up to 1066 MHz • 8 internal banks for concurrent operation • 8n-bit pre-fetch architecture

128MX8, 64MX16 1Gb DDR3 SDRAM

FEATURES • Standard Voltage: VDD and VDDQ = 1.5V ± 0.075V • Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V • High speed data transfer rates with system frequency up to 1066 MHz • 8 internal banks for concurrent operation • 8n-bit pre-fetch architecture

Programmable CAS Latency

文件：3.89952 Mbytes Page：88 Pages