1Gb (x8, x16) DDR2 SDRAM

文件：863.44 Kbytes Page：28 Pages

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4-bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency-1  Programmable Burst Sequence: Sequential o

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4-bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency-1  Programmable Burst Sequence: Sequential o

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4-bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency-1  Programmable Burst Sequence: Sequential o

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4-bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency-1  Programmable Burst Sequence: Sequential o

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4-bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency-1  Programmable Burst Sequence: Sequential o

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4‐bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency‐1  Programmable Burst Sequence: Sequential

1Gb (x8, x16) DDR2 SDRAM

FEATURES  Clock frequency up to 400MHz  8 internal banks for concurrent operation  4-bit prefetch architecture  Programmable CAS Latency: 3, 4, 5, 6 and 7  Programmable Additive Latency: 0, 1, 2, 3, 4, 5 and 6  Write Latency = Read Latency-1  Programmable Burst Sequence: Sequential o

1Gb (x8, x16) DDR2 SDRAM

文件：855.01 Kbytes Page：28 Pages

1.8V DDR2 SDRAM

1Gb (x8, x16) DDR2 SDRAM

文件：549.15 Kbytes Page：28 Pages

封装/外壳：60-TFBGA 包装：托盘 描述：IC DRAM 1GBIT PARALLEL 60TWBGA 集成电路（IC） 存储器

动态随机存储器(DRAM)

封装/外壳：60-TFBGA 包装：卷带（TR） 描述：IC DRAM 1GBIT PARALLEL 60TWBGA 集成电路（IC） 存储器

1.8V DDR2 SDRAM

Differential data strobe

文件：1.5625 Mbytes Page：49 Pages