PRESETTABLE COUNTERS

The IN74HC161A is identical in pinout to the LS/ALS161. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The IN74HC161A is programmable 4-bit synchronous counter that feature parallel Load, asynchronous Reset, a Carr

Presettable Counters High-Performance Silicon-Gate CMOS

The IN74HC161A is identical in pinout to the LS/ALS161. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. The IN74HC161A is programmable 4-bit synchronous counter that feature parallel Load, asynchronous Reset, a Carr

Presettable Counters High-Performance Silicon-Gate CMOS

Presettable counter, high-performance silicon-gate CMOS

Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

Presettable synchronous 4-bit binary counter; asynchronous reset

1. General description The 74HC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positivegoing edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HI

Presettable synchronous 4-bit binary counter; asynchronous reset

1. General description The 74HC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positivegoing edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HI

Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive