Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

Presettable synchronous 4-bit binary counter; asynchronous reset

1. General description The 74HC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positivegoing edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HI

逻辑器件

Presettable synchronous 4-bit binary counter; asynchronous reset

1. General description The 74HC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positivegoing edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HI

Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

Presettable synchronous 4-bit binary counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT161 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

Presettable synchronous 4-bit binary counter; asynchronous reset

1. General description The 74HC161 is a synchronous presettable binary counter with an internal look-head carry. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positivegoing edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset HI

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SYNC 4BIT BINARY COUNT 16SOIC 集成电路（IC） 计数器，除法器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BINARY COUNTER SYNC 16SOIC 集成电路（IC） 计数器，除法器

74HC161DB - Presettable synchronous 4-bit binary counter; asynchronous reset

Presettable synchronous 4-bit binary counter; asynchronous reset

Presettable synchronous 4-bit binary counter; asynchronous reset

文件：272.51 Kbytes Page：17 Pages

Presettable synchronous 4-bit binary counter; asynchronous reset

文件：272.51 Kbytes Page：17 Pages

Presettable synchronous 4-bit binary counter; asynchronous reset

文件：272.51 Kbytes Page：17 Pages