型号 功能描述 生产厂家 企业 LOGO 操作
IDT2305

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

IDT2305

3.3V ZERO DELAY CLOCK BUFFER

文件:208.96 Kbytes Page:11 Pages

IDT

IDT2305

3.3V ZERO DELAY CLOCK BUFFER No external RC network required

文件:186.6 Kbytes Page:12 Pages

IDT

IDT2305

3.3V ZERO DELAY CLOCK BUFFER

文件:145.8 Kbytes Page:12 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305 is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. The IDT2305 is

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305B is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305B is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305B is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305B is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305B is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305B is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

DESCRIPTION: The IDT2305B is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz. FEATURE

IDT

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

FEATURES: • Phase-Lock Loop Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Zero Input-Output Delay • Output Skew

RENESAS

瑞萨

FIVE OUTPUT 3.3V CLOCK BUFFER

DESCRIPTION: The IDT2305NZ is a low-cost buffer designed to distribute high-speed clocks in mobile PC systems and desktop PC systems. The IDT2305NZ operates at 3.3V with five outputs that can run up to 133.33MHz FEATURES: • One input to five output buffer/driver • Low power consumpti

IDT

FIVE OUTPUT 3.3V CLOCK BUFFER

FEATURES: • One input to five output buffer/driver • Low power consumption for mobile applications: less than 32mA at 66.6MHz with unloaded outputs • 8.7ns max input-output delay • Buffers all frequencies from DC to 133.33MHz • Output-output skew

RENESAS

瑞萨

2.5V CLOCK BUFFER

FEATURES: • Clock Distribution • 10MHz to 133MHz operating frequency • Distributes one clock input to one bank of five outputs • Output Skew

RENESAS

瑞萨

3.3V ZERO DELAY CLOCK BUFFER

文件:208.96 Kbytes Page:11 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER No external RC network required

文件:186.6 Kbytes Page:12 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:208.96 Kbytes Page:11 Pages

IDT

封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:管件 描述:IC CLK BUFFER 3.3V ZD 8-SOIC 集成电路(IC) 时钟发生器,PLL,频率合成器

ETC

知名厂家

3.3V ZERO DELAY CLOCK BUFFER

文件:208.96 Kbytes Page:11 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:208.96 Kbytes Page:11 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:208.96 Kbytes Page:11 Pages

IDT

封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:管件 描述:IC CLK BUFFER 3.3V ZD 8-SOIC 集成电路(IC) 时钟发生器,PLL,频率合成器

ETC

知名厂家

3.3V ZERO DELAY CLOCK BUFFER

文件:208.96 Kbytes Page:11 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:208.96 Kbytes Page:11 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:208.96 Kbytes Page:11 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:208.96 Kbytes Page:11 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:160.32 Kbytes Page:10 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:184.79 Kbytes Page:12 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:155.35 Kbytes Page:12 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:160.32 Kbytes Page:10 Pages

IDT

3.3V ZERO DELAY CLOCK BUFFER

文件:184.79 Kbytes Page:12 Pages

IDT

IDT2305产品属性

  • 类型

    描述

  • 型号

    IDT2305

  • 制造商

    IDT

  • 制造商全称

    Integrated Device Technology

  • 功能描述

    3.3V ZERO DELAY CLOCK BUFFER

更新时间:2025-12-31 22:58:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
IDT
2016+
TSSOP8
4000
只做原装,假一罚十,公司可开17%增值税发票!
IDT
24+
SOP8
159435
明嘉莱只做原装正品现货
IDT
25+
SOP8
12496
IDT原装正品IDT2305A-1HDCGI即刻询购立享优惠#长期有货
IDT
2430+
SOP8
8540
只做原装正品假一赔十为客户做到零风险!!
IDT
2025+
SOP
3795
全新原装、公司现货热卖
IDT
2025+
SOP8
2500
原装进口价格优 请找坤融电子!
IDT
20+
SOP8
2860
原厂原装正品价格优惠公司现货欢迎查询
INTEGRATED DEVICE TECHNOLOGY
25+
3000
全新原装!优势库存热卖中!
IDTINTEGR
24+
8-SOIC
6000
只做原装正品!现货库存!公司可开16点增值税发票!
IDT
19+
SOP8
25000

IDT2305数据表相关新闻