位置:首页 > IC中文资料第12802页 > ICS91305
型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
---|---|---|---|---|
ICS91305 | High Performance Communication Buffer General Description The ICS91305 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at s | ICST | ||
ICS91305 | High Performance Communication Buffer Features • Zero input - output delay • Frequency range 10 - 133 MHz (3.3V) • 5V tolerant input REF • High loop filter bandwidth ideal for Spread Spectrum applications. • Less than 200 ps Jitter between outputs • Skew controlled outputs • Skew less than 250 ps between outputs • Available i | RENESAS 瑞萨 | ||
ICS91305 | High Performance Communication Buffer | RENESAS 瑞萨 | ||
HIGH PERFORMANCE COMMUNICATION BUFFER Features • Zero input - output delay • Frequency range 10 - 133 MHz (3.3V) • 5V tolerant input REF • High loop filter bandwidth ideal for Spread Spectrum applications • Less than 200 ps Jitter between outputs • Skew controlled outputs • Skew less than 250 ps between outputs • Available in | RENESAS 瑞萨 | |||
HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay Description The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at speeds f | IDT | |||
High Performance Communication Buffer General Description The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at | ICSI | |||
High Performance Communication Buffer General Description The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at | ICSI | |||
High Performance Communication Buffer General Description The ICS91305 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at s | ICST | |||
High Performance Communication Buffer General Description The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at | ICSI | |||
High Performance Communication Buffer General Description The ICS91305 is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at s | ICST | |||
HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay | RENESAS 瑞萨 | |||
HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay Description The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at speeds f | IDT | |||
HIGH PERFORMANCE COMMUNICATION BUFFER Features • Zero input - output delay • Frequency range 10 - 133 MHz (3.3V) • 5V tolerant input REF • High loop filter bandwidth ideal for Spread Spectrum applications • Less than 200 ps Jitter between outputs • Skew controlled outputs • Skew less than 250 ps between outputs • Available in | RENESAS 瑞萨 | |||
HIGH PERFORMANCE COMMUNICATION BUFFER Features • Zero input - output delay • Frequency range 10 - 133 MHz (3.3V) • 5V tolerant input REF • High loop filter bandwidth ideal for Spread Spectrum applications • Less than 200 ps Jitter between outputs • Skew controlled outputs • Skew less than 250 ps between outputs • Available in | RENESAS 瑞萨 | |||
HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay Description The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at speeds f | IDT | |||
HIGH PERFORMANCE COMMUNICATION BUFFER Zero input - output delay Description The ICS91305I is a high performance, low skew, low jitter clock driver. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at speeds f | IDT |
ICS91305产品属性
- 类型
描述
- 型号
ICS91305
- 制造商
ICS
- 制造商全称
ICS
- 功能描述
High Performance Communication Buffer
IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
ICS |
24+ |
SOP8 |
20000 |
全新原厂原装,进口正品现货,正规渠道可含税!! |
|||
IDT |
23 |
SOP8 |
30000 |
代理全新原装现货 价格优势 |
|||
23+ |
原厂封装 |
9888 |
专做原装正品,假一罚百! |
||||
ICS |
25+23+ |
SOP-8 |
37177 |
绝对原装正品全新进口深圳现货 |
|||
ICS |
22+ |
SOP |
8000 |
原装正品支持实单 |
|||
ICS |
25+ |
SOP8 |
3200 |
全新原装、诚信经营、公司现货销售 |
|||
ICS |
24+ |
SO-8 |
2410 |
||||
ICS |
2402+ |
SOP-8 |
8324 |
原装正品!实单价优! |
|||
IDT |
24+ |
SOP8 |
17500 |
郑重承诺只做原装进口现货 |
|||
ICS |
25+ |
SOP-8 |
860000 |
明嘉莱只做原装正品现货 |
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ICS91305规格书下载地址
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DdatasheetPDF页码索引
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