2K x 8 CMOS RAM

Description The HM-6516 is a CMOS 2048 x 8 Static Random Access Memory. Extremely low power operation is achieved by the use of complementary MOS design techniques. This low power is further enhanced by the use of synchronous circuit techniques that keep the active (operating) power low, which

2K x 8 CMOS RAM

Features • Low Power Standby. . . . . . . . . . . . . . . . . . . 275μW Max • Low Power Operation . . . . . . . . . . . . . .55mW/MHz Max • Fast Access Time . . . . . . . . . . . . . . . . . 120/200ns Max • Industry Standard Pinout • Single Supply . . . . . . . . . . . . . . . . . . . . . . .

2K x 8 CMOS RAM

Description The HM-6516/883 is a CMOS 2048 x 8 Static Random Access Memory. Extremely low power operation is achieved by the use of complementary MOS design techniques. This low power is further enhanced by the use of synchronous circuit techniques that keep the active (operating) power low, whic

2K x 8 Asynchronous CMOS Static RAM

Description The HM-65162 is a CMOS 2048 x 8 Static Random Access Memory manufactured using the Intersil Advanced SAJI V process. The device utilizes asynchronous circuit design for fast cycle time and ease of use. Features • Fast Access Time . . . . . . . . . . . . . . . . . . 70/90ns M

2kx8 Asynchronous CMOS Static RAM

• This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. • Fast Access Time . . . . . . . . . . . . . . . . . . . . 70/90ns Max • Low Standby Current . . . . . . . . . . . . . . . . . . . 50A Max • Low Operating Current. . . . .

2K x 8 Asynchronous CMOS Static RAM

Description The HM-65162/883 is a CMOS 2048 x 8 Static Random Access Memory manufactured using the Intersil Advanced SAJI V process. The device utilizes asynchronous circuit design for fast cycle time and ease of use. The pinout is the JEDEC 24 pin DIP, and 32 pad 8-bit wide standard which allo

2K x 8 Asynchronous CMOS Static RAM

Description The HM-65162/883 is a CMOS 2048 x 8 Static Random Access Memory manufactured using the Intersil Advanced SAJI V process. The device utilizes asynchronous circuit design for fast cycle time and ease of use. The pinout is the JEDEC 24 pin DIP, and 32 pad 8-bit wide standard which allo

2K x 8 Asynchronous CMOS Static RAM

Description The HM-65162/883 is a CMOS 2048 x 8 Static Random Access Memory manufactured using the Intersil Advanced SAJI V process. The device utilizes asynchronous circuit design for fast cycle time and ease of use. The pinout is the JEDEC 24 pin DIP, and 32 pad 8-bit wide standard which allo

2kx8 Asynchronous CMOS Static RAM

• This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. • Fast Access Time . . . . . . . . . . . . . . . . . . . . 70/90ns Max • Low Standby Current . . . . . . . . . . . . . . . . . . . 50A Max • Low Operating Current. . . . .

2K x 8 CMOS RAM

Description The HM-6516/883 is a CMOS 2048 x 8 Static Random Access Memory. Extremely low power operation is achieved by the use of complementary MOS design techniques. This low power is further enhanced by the use of synchronous circuit techniques that keep the active (operating) power low, whic

2K x 8 CMOS RAM

Description The HM-6516/883 is a CMOS 2048 x 8 Static Random Access Memory. Extremely low power operation is achieved by the use of complementary MOS design techniques. This low power is further enhanced by the use of synchronous circuit techniques that keep the active (operating) power low, whic

2kx8 Asynchronous CMOS Static RAM

LOW DROPOUT VOLTAGE REGULATOR 16V, 500mA, LOW IQ, CMOS LDO

DESCRIPTION A6516 series are high precise, low power consumption, high voltage input, positive voltage regulators manufactured using CMOS and laser trimming technologies. The A6516 consists of a current limiter circuit, a driver transistor, a precision reference voltage and a correction circuit.

Pilot-Operated Solenoid Valve for Process Actuation

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Standard Weco to BNC (M) Cable

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31 MHz, Dual Programmable Filters

文件：1.05542 Mbytes Page：32 Pages

Dual Programmable Filters and Variable Gain Amplifiers

文件：1.11995 Mbytes Page：29 Pages