Octal D-type Transparent Latches (with 3-state outputs),Octal D-type Transparent Latches (with inverted 3-state outputs)

Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again

Octal D-type Transparent Latches (with 3-state outputs)/Octal D-type Transparent Latches (with inverted 3-state outputs)

Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again

Octal D-type Transparent Latches (with 3-state outputs),Octal D-type Transparent Latches (with inverted 3-state outputs)

Octal D-type Transparent Latches

Octal D-type Transparent Latches (with 3-state outputs)/Octal D-type Transparent Latches (with inverted 3-state outputs)

Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again

Octal D-type Transparent Latches (with 3-state outputs)/Octal D-type Transparent Latches (with inverted 3-state outputs)

Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again

Octal D-type Transparent Latches (with 3-state outputs)/Octal D-type Transparent Latches (with inverted 3-state outputs)

Description When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high again

Octal D-type Transparent Latches (with 3-state outputs)

文件：163.47 Kbytes Page：12 Pages

Octal D-type Transparent Latches (with 3-state outputs)

文件：163.47 Kbytes Page：12 Pages

General-Purpose Logics-HD/RD74HC Series

Octal D-type Transparent Latches (with 3-state outputs)

文件：163.47 Kbytes Page：12 Pages

Octal D-type Transparent Latches (with 3-state outputs)

文件：163.47 Kbytes Page：12 Pages

Octal D-type Transparent Latches (with 3-state outputs)

文件：163.47 Kbytes Page：12 Pages

Octal D-type transparent latch; 3-state

Octal Transparent D-type Latches W ith 3-State Outputs

GENERAL DESCRIPTION 74HC373 is fabricated with high-speed silicon gate CMOS technology. It has the high noise immunity and low power consumption of standard CMOS integrated circuits. The eight latches in 74HC373 devices are transparent D-type latches. While the latch-enable (LE) input is high, th

Octal 3?뭆tate Non?묲nverting Transparent Latch

文件：129.88 Kbytes Page：9 Pages

Octal D-type transparent latch; 3-state

文件：56.85 Kbytes Page：8 Pages

OCTAL D-TYPE TRANSPARENT LATCH 3-STATE

文件：243.15 Kbytes Page：5 Pages