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GAL22V10D-25LP价格
参考价格:¥75.7917
型号:GAL22V10D-25LPI 品牌:Lattice Semi 备注:这里有GAL22V10D-25LP多少钱,2025年最近7天走势,今日出价,今日竞价,GAL22V10D-25LP批发/采购报价,GAL22V10D-25LP行情走势销售排行榜,GAL22V10D-25LP报价。型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
---|---|---|---|---|
GAL22V10D-25LP | High Performance E2CMOS PLD Generic Array Logic Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les | Lattice 莱迪思 | ||
GAL22V10D-25LP | GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les | Lattice 莱迪思 | ||
GAL22V10D-25LP | Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l | Lattice 莱迪思 | ||
GAL22V10D-25LP | All Devices Discontinued 文件:718.73 Kbytes Page:23 Pages | Lattice 莱迪思 | ||
GAL22V10D-25LP | All Devices Discontinued 文件:718.73 Kbytes Page:23 Pages | Lattice 莱迪思 | ||
GAL22V10D-25LP | 封装/外壳:24-DIP(0.300",7.62mm) 包装:散装 描述:IC CPLD 10MC 25NS 24DIP 集成电路(IC) CPLD(复杂可编程逻辑器件) | ETC 知名厂家 | ETC | |
GAL22V10D-25LP | IC CPLD 10MC 25NS 24DIP | Lattice 莱迪思 | ||
High Performance E2CMOS PLD Generic Array Logic Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les | Lattice 莱迪思 | |||
GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les | Lattice 莱迪思 | |||
Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l | Lattice 莱迪思 | |||
Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l | Lattice 莱迪思 | |||
GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les | Lattice 莱迪思 | |||
GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les | Lattice 莱迪思 | |||
Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l | Lattice 莱迪思 | |||
All Devices Discontinued 文件:718.73 Kbytes Page:23 Pages | Lattice 莱迪思 | |||
All Devices Discontinued 文件:718.73 Kbytes Page:23 Pages | Lattice 莱迪思 | |||
All Devices Discontinued 文件:718.73 Kbytes Page:23 Pages | Lattice 莱迪思 | |||
All Devices Discontinued 文件:718.73 Kbytes Page:23 Pages | Lattice 莱迪思 | |||
封装/外壳:24-DIP(0.300",7.62mm) 包装:管件 描述:IC CPLD 10MC 25NS 24DIP 集成电路(IC) CPLD(复杂可编程逻辑器件) | ETC 知名厂家 | ETC | ||
IC CPLD 10MC 25NS 24DIP | Lattice 莱迪思 | |||
IC CPLD 10MC 25NS 24DIP | Lattice 莱迪思 | |||
All Devices Discontinued 文件:718.73 Kbytes Page:23 Pages | Lattice 莱迪思 | |||
All Devices Discontinued 文件:718.73 Kbytes Page:23 Pages | Lattice 莱迪思 | |||
High Performance E2CMOS PLD Generic Array Logic Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les | Lattice 莱迪思 | |||
GAL 22V10 Device Datasheet Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les | Lattice 莱迪思 | |||
Product Change Notifications (PCNs) have been issued to discontinue all devices in this data sheet. Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much l | Lattice 莱迪思 | |||
All Devices Discontinued 文件:718.73 Kbytes Page:23 Pages | Lattice 莱迪思 | |||
All Devices Discontinued 文件:718.73 Kbytes Page:23 Pages | Lattice 莱迪思 |
GAL22V10D-25LP产品属性
- 类型
描述
- 型号
GAL22V10D-25LP
- 功能描述
SPLD - 简单可编程逻辑器件 5V 22 I/O
- RoHS
否
- 制造商
Texas Instruments
- 逻辑系列
TICPAL22V10Z
- 大电池数量
10
- 最大工作频率
66 MHz
- 延迟时间
25 ns
- 工作电源电压
4.75 V to 5.25 V
- 电源电流
100 uA
- 最大工作温度
+ 75 C
- 最小工作温度
0 C
- 安装风格
Through Hole
- 封装/箱体
DIP-24
IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
LATTEL |
2014+ |
18 |
公司原装现货常备库存! |
||||
Lattice |
25+ |
DIP |
18000 |
原厂直接发货进口原装 |
|||
LATTICE |
06+ |
DIP24P |
200 |
原装现货海量库存欢迎咨询 |
|||
LATTICE |
23+ |
DIP24 |
8000 |
原装正品,假一罚十 |
|||
LATTICE/莱迪斯 |
21+ |
DIP24 |
9080 |
只做原装,质量保证 |
|||
LATTICE |
24+ |
DIP24 |
4000 |
原装原厂代理 可免费送样品 |
|||
LATTIC |
2023+ |
DIP |
53500 |
正品,原装现货 |
|||
Lattice(莱迪斯) |
24+ |
24-DIP(0.300 |
11298 |
||||
最新 |
2000 |
原装正品现货 |
|||||
LATTICE/莱迪斯 |
2447 |
DIP |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
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GAL22V10D-25LP规格书下载地址
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GAL22V10D-25LP数据表相关新闻
GALI-4F+
GALI-4F+
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2019-4-9
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