N-Channel, Logic Level, PowerTrenchTM MOSFET

General Description This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on state resistance and yet maintain low gate charge for superior switching performance. Features • 46 A, 30 V RDS(ON) = 12 m

isc N-Channel MOSFET Transistor

FEATURES ·Drain Current : ID=46A@ TC=25℃ ·Drain Source Voltage : VDSS=30V(Min) ·Static Drain-Source On-Resistance : RDS(on) =12mΩ(Max) @ VGS= 10V ·100 avalanche tested ·Minimum Lot-to-Lot variations for robust device performance and reliable operation DESCRIPTION ·motor drive, DC-DC co

N-channel Enhancement Mode Power MOSFET

Features  VDS= 30V, ID= 80A RDS(ON)

30V N沟道PowerTrench® MOSFET

30V N-Channel PowerTrench MOSFET

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N-Channel, Logic Level, PowerTrenchTM MOSFET

General Description This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on state resistance and yet maintain low gate charge for superior switching performance. Features • 46 A, 30 V RDS(ON) = 12 m

30V N-Channel PowerTrench SyncFET

General Description This MOSFET is designed to replace a single MOSFET and parallel Schottky diode in synchronous DC:DC power supplies. This 30V MOSFET is designed to maximize power conversion efficiency, providing a low RDS(ON) and low gate charge. The FDP6690S includes an integrated Schottky di

Single N-Channel Logic Level PWM Optimized PowerTrench MOSFET

General Description This N Channel Logic Level MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. The MOSFET features faster switching and lower gate charge than other MOSFETs with compar

ROM Interface IC

GENERAL DESCRIPTION The MSM6690 can drive three devices of 131,072 x 8-bit EPROM or Mask ROM. The MSM6690 contains a built-in internal address generator circuit and one external clock input that enables contiued serial read operations. The internal address counter is automatically incremented by