丝印代码：DS92LV090ATVEH；DS92LV090A 9 Channel Bus LVDS Transceiver

1FEATURES 2• Bus LVDS Signaling • 3.2 Nanosecond Propagation Delay Max • Chip to Chip Skew ±800ps • Low Power CMOS Design • High Signaling Rate Capability (Above 100 Mbps) • 0.1V to 2.3V Common Mode Range for VID = 200mV • ±100 mV Receiver Sensitivity • Supports Open and Terminated Fails

丝印代码：DS92LV090ATVEH；DS92LV090A 9 Channel Bus LVDS Transceiver

1FEATURES 2• Bus LVDS Signaling • 3.2 Nanosecond Propagation Delay Max • Chip to Chip Skew ±800ps • Low Power CMOS Design • High Signaling Rate Capability (Above 100 Mbps) • 0.1V to 2.3V Common Mode Range for VID = 200mV • ±100 mV Receiver Sensitivity • Supports Open and Terminated Fails

丝印代码：DS92LV090ATVEH；DS92LV090A 9 Channel Bus LVDS Transceiver

1FEATURES 2• Bus LVDS Signaling • 3.2 Nanosecond Propagation Delay Max • Chip to Chip Skew ±800ps • Low Power CMOS Design • High Signaling Rate Capability (Above 100 Mbps) • 0.1V to 2.3V Common Mode Range for VID = 200mV • ±100 mV Receiver Sensitivity • Supports Open and Terminated Fails

丝印代码：DS92LV090ATVEH；DS92LV090A 9 Channel Bus LVDS Transceiver

1FEATURES 2• Bus LVDS Signaling • 3.2 Nanosecond Propagation Delay Max • Chip to Chip Skew ±800ps • Low Power CMOS Design • High Signaling Rate Capability (Above 100 Mbps) • 0.1V to 2.3V Common Mode Range for VID = 200mV • ±100 mV Receiver Sensitivity • Supports Open and Terminated Fails

丝印代码：DS92LV090ATVEH；DS92LV090A 9 Channel Bus LVDS Transceiver

1FEATURES 2• Bus LVDS Signaling • 3.2 Nanosecond Propagation Delay Max • Chip to Chip Skew ±800ps • Low Power CMOS Design • High Signaling Rate Capability (Above 100 Mbps) • 0.1V to 2.3V Common Mode Range for VID = 200mV • ±100 mV Receiver Sensitivity • Supports Open and Terminated Fails

丝印代码：DS92LV090ATVEH；DS92LV090A 9 Channel Bus LVDS Transceiver

1FEATURES 2• Bus LVDS Signaling • 3.2 Nanosecond Propagation Delay Max • Chip to Chip Skew ±800ps • Low Power CMOS Design • High Signaling Rate Capability (Above 100 Mbps) • 0.1V to 2.3V Common Mode Range for VID = 200mV • ±100 mV Receiver Sensitivity • Supports Open and Terminated Fails

丝印代码：DS92LV1260TUJB；DS92LV1260 Six Channel 10 Bit BLVDS Deserializer

1FEATURES 2• Deserializes One to Six BusLVDS Input Serial Data Streams with Embedded Clocks • Seven Selectable Serial Inputs to Support n+1 Redundancy of Deserialized Streams • Seventh Channel has Single Pin Monitor Output That Reflects Input From Seventh Channel Input • Parallel Clock Rat

丝印代码：DS92LV1260TUJB；DS92LV1260 Six Channel 10 Bit BLVDS Deserializer

1FEATURES 2• Deserializes One to Six BusLVDS Input Serial Data Streams with Embedded Clocks • Seven Selectable Serial Inputs to Support n+1 Redundancy of Deserialized Streams • Seventh Channel has Single Pin Monitor Output That Reflects Input From Seventh Channel Input • Parallel Clock Rat

丝印代码：DS92LV1260TUJB；DS92LV1260 Six Channel 10 Bit BLVDS Deserializer

1FEATURES 2• Deserializes One to Six BusLVDS Input Serial Data Streams with Embedded Clocks • Seven Selectable Serial Inputs to Support n+1 Redundancy of Deserialized Streams • Seventh Channel has Single Pin Monitor Output That Reflects Input From Seventh Channel Input • Parallel Clock Rat

丝印代码：DS92LV1260TUJB；DS92LV1260 Six Channel 10 Bit BLVDS Deserializer

1FEATURES 2• Deserializes One to Six BusLVDS Input Serial Data Streams with Embedded Clocks • Seven Selectable Serial Inputs to Support n+1 Redundancy of Deserialized Streams • Seventh Channel has Single Pin Monitor Output That Reflects Input From Seventh Channel Input • Parallel Clock Rat

丝印代码：DS92LV16TVHG；DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

1FEATURES 2• 25–80 MHz 16:1/1:16 Serializer/Deserializer (2.56Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation With Separate Clock, Enable, Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks To Random Data) • Wi

丝印代码：DS92LV16TVHG；DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

1FEATURES 2• 25–80 MHz 16:1/1:16 Serializer/Deserializer (2.56Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation With Separate Clock, Enable, Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks To Random Data) • Wi

丝印代码：DS92LV16TVHG；DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

1FEATURES 2• 25–80 MHz 16:1/1:16 Serializer/Deserializer (2.56Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation With Separate Clock, Enable, Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks To Random Data) • Wi

丝印代码：DS92LV16TVHG；DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

1FEATURES 2• 25–80 MHz 16:1/1:16 Serializer/Deserializer (2.56Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation With Separate Clock, Enable, Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks To Random Data) • Wi

丝印代码：DS92LV16TVHG；DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

1FEATURES 2• 25–80 MHz 16:1/1:16 Serializer/Deserializer (2.56Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation With Separate Clock, Enable, Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks To Random Data) • Wi

丝印代码：DS92LV16TVHG；DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

1FEATURES 2• 25–80 MHz 16:1/1:16 Serializer/Deserializer (2.56Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation With Separate Clock, Enable, Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks To Random Data) • Wi

丝印代码：DS92LV16TVHG；DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

1FEATURES 2• 25–80 MHz 16:1/1:16 Serializer/Deserializer (2.56Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation With Separate Clock, Enable, Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks To Random Data) • Wi

丝印代码：DS92LV16TVHG；DS92LV16 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

1FEATURES 2• 25–80 MHz 16:1/1:16 Serializer/Deserializer (2.56Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation With Separate Clock, Enable, Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks To Random Data) • Wi

丝印代码：DS92LV18TVV；DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

1FEATURES 2• 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation with Separate Clock, Enable, and Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks to Random Data)

丝印代码：DS92LV18TVV；DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

1FEATURES 2• 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation with Separate Clock, Enable, and Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks to Random Data)

丝印代码：DS92LV18TVV；DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

1FEATURES 2• 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation with Separate Clock, Enable, and Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks to Random Data)

丝印代码：DS92LV18TVV；DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

1FEATURES 2• 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation with Separate Clock, Enable, and Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks to Random Data)

丝印代码：DS92LV18TVV；DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

1FEATURES 2• 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation with Separate Clock, Enable, and Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks to Random Data)

丝印代码：DS92LV18TVV；DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

1FEATURES 2• 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation with Separate Clock, Enable, and Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks to Random Data)

丝印代码：DS92LV18TVV；DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

1FEATURES 2• 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation with Separate Clock, Enable, and Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks to Random Data)

丝印代码：DS92LV18TVV；DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

1FEATURES 2• 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376 Gbps Full Duplex Throughput) • Independent Transmitter and Receiver Operation with Separate Clock, Enable, and Power Down Pins • Hot Plug Protection (Power Up High Impedance) and Synchronization (Receiver Locks to Random Data)

丝印代码：DS92LV8028TUF；DS92LV8028 8 Channel 10:1 Serializer

1FEATURES 2• All 8 Channels Synchronous to One Parallel Clock Rate, from 25 to 66 MHz • Duplicates Function of Multiple DS92LV1021 and '1023 10-bit Serializer Devices • Serializes from One to Eight 10-bit Parallel Inputs into Data Streams with Embedded Clock • Eight 5 mA Modified Bus LVDS

丝印代码：DS92LV8028TUF；DS92LV8028 8 Channel 10:1 Serializer

1FEATURES 2• All 8 Channels Synchronous to One Parallel Clock Rate, from 25 to 66 MHz • Duplicates Function of Multiple DS92LV1021 and '1023 10-bit Serializer Devices • Serializes from One to Eight 10-bit Parallel Inputs into Data Streams with Embedded Clock • Eight 5 mA Modified Bus LVDS

丝印代码：DS92LV8028TUF；DS92LV8028 8 Channel 10:1 Serializer

1FEATURES 2• All 8 Channels Synchronous to One Parallel Clock Rate, from 25 to 66 MHz • Duplicates Function of Multiple DS92LV1021 and '1023 10-bit Serializer Devices • Serializes from One to Eight 10-bit Parallel Inputs into Data Streams with Embedded Clock • Eight 5 mA Modified Bus LVDS

丝印代码：DS92LV8028TUF；DS92LV8028 8 Channel 10:1 Serializer

1FEATURES 2• All 8 Channels Synchronous to One Parallel Clock Rate, from 25 to 66 MHz • Duplicates Function of Multiple DS92LV1021 and '1023 10-bit Serializer Devices • Serializes from One to Eight 10-bit Parallel Inputs into Data Streams with Embedded Clock • Eight 5 mA Modified Bus LVDS

DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

丝印代码：LV010ATM；DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

丝印代码：LV010ATM；DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

丝印代码：LV010ATM；DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

丝印代码：LV010ATM；DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

丝印代码：LV010ATM；DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

丝印代码：LV010ATM；DS92LV010A Bus LVDS 3.3/5.0V Single Transceiver

1FEATURES 2• Bus LVDS Signaling (BLVDS) • Designed for Double Termination Applications • Balanced Output Impedance • Lite Bus Loading 5pF Typical • Glitch Free Power Up/Down (Driver Disabled) • 3.3V or 5.0V Operation • ±1V Common Mode Range • ±100mV Receiver Sensitivity • High Signaling R

DS92LV040A 4 Channel Bus LVDS Transceiver

1 Features 1• Bus LVDS Signaling • Propagation Delay: Driver 2.3 ns Max, Receiver 3.2 ns Max • Low power CMOS Design • 100% Transition Time 1 ns Driver Typical, 1.3 ns Receiver Typical • High Signaling Rate Capability (above 155 Mbps) • 0.1 V to 2.3 V Common Mode Range for VID = 200 m

丝印代码：LV040A；DS92LV040A 4 Channel Bus LVDS Transceiver

1 Features 1• Bus LVDS Signaling • Propagation Delay: Driver 2.3 ns Max, Receiver 3.2 ns Max • Low power CMOS Design • 100% Transition Time 1 ns Driver Typical, 1.3 ns Receiver Typical • High Signaling Rate Capability (above 155 Mbps) • 0.1 V to 2.3 V Common Mode Range for VID = 200 m

DS92LV040A 4 Channel Bus LVDS Transceiver

1 Features 1• Bus LVDS Signaling • Propagation Delay: Driver 2.3 ns Max, Receiver 3.2 ns Max • Low power CMOS Design • 100% Transition Time 1 ns Driver Typical, 1.3 ns Receiver Typical • High Signaling Rate Capability (above 155 Mbps) • 0.1 V to 2.3 V Common Mode Range for VID = 200 m

丝印代码：LV040A；DS92LV040A 4 Channel Bus LVDS Transceiver

1 Features 1• Bus LVDS Signaling • Propagation Delay: Driver 2.3 ns Max, Receiver 3.2 ns Max • Low power CMOS Design • 100% Transition Time 1 ns Driver Typical, 1.3 ns Receiver Typical • High Signaling Rate Capability (above 155 Mbps) • 0.1 V to 2.3 V Common Mode Range for VID = 200 m

丝印代码：LV040A；DS92LV040A 4 Channel Bus LVDS Transceiver

1 Features 1• Bus LVDS Signaling • Propagation Delay: Driver 2.3 ns Max, Receiver 3.2 ns Max • Low power CMOS Design • 100% Transition Time 1 ns Driver Typical, 1.3 ns Receiver Typical • High Signaling Rate Capability (above 155 Mbps) • 0.1 V to 2.3 V Common Mode Range for VID = 200 m

丝印代码：LV040A；DS92LV040A 4 Channel Bus LVDS Transceiver

1 Features 1• Bus LVDS Signaling • Propagation Delay: Driver 2.3 ns Max, Receiver 3.2 ns Max • Low power CMOS Design • 100% Transition Time 1 ns Driver Typical, 1.3 ns Receiver Typical • High Signaling Rate Capability (above 155 Mbps) • 0.1 V to 2.3 V Common Mode Range for VID = 200 m

丝印代码：LV040A；DS92LV040A 4 Channel Bus LVDS Transceiver

1 Features 1• Bus LVDS Signaling • Propagation Delay: Driver 2.3 ns Max, Receiver 3.2 ns Max • Low power CMOS Design • 100% Transition Time 1 ns Driver Typical, 1.3 ns Receiver Typical • High Signaling Rate Capability (above 155 Mbps) • 0.1 V to 2.3 V Common Mode Range for VID = 200 m

丝印代码：LV040A；DS92LV040A 4 Channel Bus LVDS Transceiver

1 Features 1• Bus LVDS Signaling • Propagation Delay: Driver 2.3 ns Max, Receiver 3.2 ns Max • Low power CMOS Design • 100% Transition Time 1 ns Driver Typical, 1.3 ns Receiver Typical • High Signaling Rate Capability (above 155 Mbps) • 0.1 V to 2.3 V Common Mode Range for VID = 200 m

DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

丝印代码：LV0411SQ；DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial

DS92LV0411 / DS92LV0412 5 - 50 MHz Channel Link II Serializer/Deserializer with LVDS Parallel Interface

1FEATURES 2• 5-Channel (4 data + 1 clock) Channel Link LVDS Parallel Interface Supports 24-bit Data 3-bit Control at 5 – 50 MHz • AC Coupled STP Interconnect up to 10 Meters in Length • Integrated Serial CML Terminations • AT–SPEED BIST Mode and Status Pin • Optional I2C Compatible Serial