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DS92LV18TVVXSLASHNOPB.A中文资料

厂家型号

DS92LV18TVVXSLASHNOPB.A

文件大小

1058.12Kbytes

页面数量

29

功能描述

DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

数据手册

下载地址一下载地址二到原厂下载

生产厂商

TI2

DS92LV18TVVXSLASHNOPB.A数据手册规格书PDF详情

1FEATURES

2• 15–66 MHz 18:1/1:18 Serializer/Deserializer

(2.376 Gbps Full Duplex Throughput)

• Independent Transmitter and Receiver

Operation with Separate Clock, Enable, and

Power Down Pins

• Hot Plug Protection (Power Up High

Impedance) and Synchronization (Receiver

Locks to Random Data)

• Wide ±5% Reference Clock Frequency

Tolerance for Easy System Design Using

Locally-Generated Clocks

• Line and Local Loopback Modes

• Robust BLVDS Serial Transmission Across

Backplanes and Cables for Low EMI

• No External Coding Required

• Internal PLL, No External PLL Components

Required

• Single +3.3V Power Supply

• Low Power: 90mA (typ) Transmitter, 100mA

(typ) at 66 MHz with PRBS-15 Pattern

• ±100 mV Receiver Input Threshold

• Loss of Lock Detection and Reporting Pin

• Industrial −40 to +85°C Temperature Range

• >2.0kV HBM ESD

• Compact, Standard 80-Pin LQFP Package

DESCRIPTION

The DS92LV18 Serializer/Deserializer (SERDES) pair

transparently translates a 18–bit parallel bus into a

BLVDS serial stream with embedded clock

information. This single serial stream simplifies

transferring a 18-bit, or less, bus over PCB traces

and cables by eliminating the skew problems

between parallel data and clock paths. It saves

system cost by narrowing data paths that in turn

reduce PCB layers, cable width, and connector size

and pins.

This SERDES pair includes built-in system and

device test capability. The line loopback feature

enables the user to check the integrity of the serial

data transmission paths of the transmitter and

receiver while deserializing the serial data to parallel

data at the receiver outputs. The local loopback

feature enables the user to check the integrity of the

transceiver from the local parallel-bus side.

The DS92LV18 incorporates modified BLVDS

signaling on the high-speed I/O. BLVDS provides a

low power and low noise environment for reliably

transferring data over a serial transmission path. The

equal and opposite currents through the differential

data path control EMI by coupling the resulting

fringing fields together.

更新时间:2025-10-15 11:00:00
供应商 型号 品牌 批号 封装 库存 备注 价格
TI/德州仪器
23+
QFP
50000
全新原装正品现货,支持订货
IC
23+
18500
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TI/德州仪器
24+
QFN
9600
原装现货,优势供应,支持实单!
NS
23+
SMD
11
现货库存
NS
24+
SOP
100
NS
25+
SOP16
2987
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NS/国半
2447
SOP16
100500
一级代理专营品牌!原装正品,优势现货,长期排单到货
NS
NEW
SOP-16
9823
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订
NS
23+
SOP
7000
绝对全新原装!100%保质量特价!请放心订购!
NS
24+/25+
127
原装正品现货库存价优