位置：首页 > IC中文资料第2776页 > DM74LS109AN
| 型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
DM74LS109AN | Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 |   | |
DM74LS109AN | Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs 文件：135 Kbytes Page：6 Pages | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | | |
DM74LS109AN | 封装/外壳：16-DIP（0.300"，7.62mm） 功能：设置（预设）和复位 包装：管件 描述：IC FF JK TYPE DUAL 1BIT 16DIP 集成电路（IC） 触发器 | ONSEMI 安森美半导体 | | |
Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | | ||
Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | | ||
Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs 文件：135 Kbytes Page：6 Pages | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI1 德州仪器 | | ||
LOW POWER SCHOTTKY LOW POWER SCHOTTKY The SN74LS109A consists of two high speed completely independent transition clocked JKflip-flops. | ONSEMI 安森美半导体 | |
| 替换型号 | 功能描述 | 生产厂家&企业 | LOGO | 操作 |
|---|---|---|---|---|
Dual J-K Positive-edge-triggered Flip-Flops(with Preset and Clear) | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Ouadruple 2-input Positive NAND Gates | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
LOW POWER SCHOTTKY | ONSEMI 安森美半导体 | ONSEMI | | |
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | TI 德州仪器 | TI | | |
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR | TI 德州仪器 | TI | | |
LOW POWER SCHOTTKY | ONSEMI 安森美半导体 | ONSEMI | | |
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP | Motorola 摩托罗拉 | Motorola | |
DM74LS109AN产品属性
- 类型
描述
- 型号
DM74LS109AN
- 功能描述
触发器 Dl J-K Flip-Flop
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
NS |
24+ |
SOP3.9mm |
500 |
||||
FAIRCILD |
22+ |
DIP-16 |
8000 |
原装正品支持实单 |
|||
FSC |
0136+ |
DIP-16P |
1161 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
NSC |
23+ |
PLCC |
9823 |
||||
NS |
2020+ |
DIP |
433 |
百分百原装正品 真实公司现货库存 本公司只做原装 可 |
|||
NS |
23+ |
DIP |
10000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
|||
NSC |
88+ |
DIP |
50 |
原装 |
|||
HARRIS |
2447 |
DIP |
100500 |
一级代理专营品牌!原装正品,优势现货,长期排单到货 |
|||
FAIRCHILD/仙童 |
23+ |
DIP16 |
50000 |
全新原装正品现货,支持订货 |
|||
ON/安森美 |
25+ |
电联咨询 |
7800 |
公司现货,提供拆样技术支持 |
DM74LS109AN规格书下载地址
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2012-11-9
DdatasheetPDF页码索引
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