位置：首页 > IC中文资料第1229页 > SN74LS109
SN74LS109价格
参考价格：￥4.1112
型号：SN74LS109AD 品牌：TI 备注：这里有SN74LS109多少钱，2025年最近7天走势，今日出价，今日竞价，SN74LS109批发/采购报价，SN74LS109行情走势销售排行榜，SN74LS109报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
SN74LS109 | DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY The SN54/74LS109A consists of two high speed completely independent transition clocked JKflip-flops. The clocking operation is independent of rise andfall times of the clock waveform. The JKdesignallows operation as a D flip-flop by | Motorola 摩托罗拉 |   | |
SN74LS109 | LOW POWER SCHOTTKY LOW POWER SCHOTTKY The SN74LS109A consists of two high speed completely independent transition clocked JKflip-flops. | ONSEMI 安森美半导体 | | |
SN74LS109 | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | |
SN74LS109 | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：271.36 Kbytes Page：7 Pages | TI 德州仪器 | | |
SN74LS109 | LOW POWER SCHOTTKY | ONSEMI 安森美半导体 | | |
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | ||
LOW POWER SCHOTTKY LOW POWER SCHOTTKY The SN74LS109A consists of two high speed completely independent transition clocked JKflip-flops. | ONSEMI 安森美半导体 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
LOW POWER SCHOTTKY LOW POWER SCHOTTKY The SN74LS109A consists of two high speed completely independent transition clocked JKflip-flops. | ONSEMI 安森美半导体 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | ||
LOW POWER SCHOTTKY LOW POWER SCHOTTKY The SN74LS109A consists of two high speed completely independent transition clocked JKflip-flops. | ONSEMI 安森美半导体 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level | TI 德州仪器 | | ||
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY The SN54/74LS109A consists of two high speed completely independent transition clocked JKflip-flops. The clocking operation is independent of rise andfall times of the clock waveform. The JKdesignallows operation as a D flip-flop by | Motorola 摩托罗拉 | | ||
DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY The SN54/74LS109A consists of two high speed completely independent transition clocked JKflip-flops. The clocking operation is independent of rise andfall times of the clock waveform. The JKdesignallows operation as a D flip-flop by | Motorola 摩托罗拉 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：271.36 Kbytes Page：7 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J.K POSITVE.EDGE.TRIGGERED FLIP.FLOPS WITH PRESET AND CLEAR 文件：579.2 Kbytes Page：12 Pages | TI 德州仪器 | | ||
具有清零和预置端的双路负边沿触发式 J-K 触发器 | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：271.36 Kbytes Page：7 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC） 触发器 | TI2 德州仪器 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR） 描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC） 触发器 | TI2 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J.K POSITVE.EDGE.TRIGGERED FLIP.FLOPS WITH PRESET AND CLEAR 文件：579.2 Kbytes Page：12 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：271.36 Kbytes Page：7 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR 文件：596.77 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability | TI 德州仪器 | | ||
LOW POWER SCHOTTKY LOW POWER SCHOTTKY The SN74LS109A consists of two high speed completely independent transition clocked JKflip-flops. | ONSEMI 安森美半导体 | | ||
Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | | ||
Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | | ||
Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs 文件：135 Kbytes Page：6 Pages | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | |
| 替换型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs | NSCNational Semiconductor (TI) 美国国家半导体美国国家半导体公司 | NSC | | |
Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | Fairchild | | |
Dual J-K Positive-edge-triggered Flip-Flops(with Preset and Clear) | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | | |
Ouadruple 2-input Positive NAND Gates | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | |
SN74LS109产品属性
- 类型
描述
- 型号
SN74LS109
- 功能描述
触发器 Dual Pos-Edge-Trig J-K Flip-Flop
- RoHS
否
- 制造商
Texas Instruments
- 电路数量
2
- 逻辑系列
SN74
- 逻辑类型
D-Type Flip-Flop
- 极性
Inverting, Non-Inverting
- 输入类型
CMOS
- 传播延迟时间
4.4 ns
- 高电平输出电流
- 16 mA
- 低电平输出电流
16 mA
- 电源电压-最大
5.5 V
- 最大工作温度
+ 85 C
- 安装风格
SMD/SMT
- 封装/箱体
X2SON-8
- 封装
Reel
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI/德州仪器 |
24+ |
SOP-16 |
9600 |
原装现货,优势供应,支持实单! |
|||
TI/德州仪器 |
25+ |
原厂封装 |
10280 |
原厂授权代理,专注军工、汽车、医疗、工业、新能源！ |
|||
TI |
24+ |
PDIP|16 |
798400 |
免费送样原盒原包现货一手渠道联系 |
|||
TI |
1716+ |
? |
7500 |
只做原装进口,假一罚十 |
|||
TI(德州仪器) |
23+ |
PDIP-16 |
9980 |
原装正品，支持实单 |
|||
ADI |
23+ |
DIP16 |
8000 |
只做原装现货 |
|||
TI德州仪器 |
22+ |
24000 |
原装正品现货,实单可谈,量大价优 |
||||
ADI |
23+ |
DIP16 |
7000 |
||||
TI/德州仪器 |
25+ |
原厂封装 |
10280 |
||||
最新 |
2000 |
原装正品现货 |
SN74LS109规格书下载地址
SN74LS109参数引脚图相关
- t4242
- t40
- t2222
- t2010
- t100k
- sw-262
- stm32f103
- stm32
- stk
- stc89c52rc
- stc12c5a60s2
- st70
- st18
- sst25vf040
- sr2m
- spwm
- spice模型
- spd
- sp3232
- soc
- SN74S38
- SN74S37
- SN74S32
- SN74S30
- SN74S22
- SN74S20
- SN74S15
- SN74S11
- SN74S10
- SN74S09
- SN74S08
- SN74S05
- SN74S04
- SN74S03
- SN74S02
- SN74S00
- SN74S
- SN74LVT
- SN74LVC
- SN74LV
- SN74LS10W
- SN74LS10NS
- SN74LS10NDS
- SN74LS10ND
- SN74LS10N
- SN74LS10JS
- SN74LS10JDS
- SN74LS10JD
- SN74LS10J
- SN74LS109N
- SN74LS109AW
- SN74LS109ANS
- SN74LS109ANDS
- SN74LS109AND
- SN74LS109AN
- SN74LS109AJS
- SN74LS109AJDS
- SN74LS109AJD
- SN74LS109AJ
- SN74LS109A
- SN74LS107N
- SN74LS107AW
- SN74LS107ANS
- SN74LS107ANDS
- SN74LS107AND
- SN74LS107AN
- SN74LS107AJS
- SN74LS107AJDS
- SN74LS107AJD
- SN74LS107AJ
- SN74LS107A
- SN74LS10
- SN74LS09NS
- SN74LS09NDS
- SN74LS09ND
- SN74LS09N
- SN74LS09JS
- SN74LS09JDS
- SN74LS09JD
- SN74LS09J
- SN74LS
- SN74L71
- SN74L44
- SN74L43
- SN74L42
- SN74HC
- SN74H87
- SN74H78
- SN74H74
- SN74H62
- SN74H61
- SN74H60
- SN74H00
- SN74F86
- SN74F74
- SN74F51
- SN74F38
- SN74F37
- SN74F36
- SN74F32
SN74LS109数据表相关新闻
SN74LS125ADR
SN74LS125ADR
2024-3-25SN74LS123DRG4
SN74LS123DRG4
2022-12-9SN74LS11DR
SN74LS11DR
2021-1-5SN74LS00N
SN74LS00N
2020-9-27SN74LS08N
SN74LS08N
2020-9-27SN74LS07DR具有集电极开路高电压输出的十六进制缓冲器/驱动器
原装正品，价格优势，竭力为您服务 0755-88600196/QQ3007281353
2019-6-24
DdatasheetPDF页码索引
- P1
- P2
- P3
- P4
- P5
- P6
- P7
- P8
- P9
- P10
- P11
- P12
- P13
- P14
- P15
- P16
- P17
- P18
- P19
- P20
- P21
- P22
- P23
- P24
- P25
- P26
- P27
- P28
- P29
- P30
- P31
- P32
- P33
- P34
- P35
- P36
- P37
- P38
- P39
- P40
- P41
- P42
- P43
- P44
- P45
- P46
- P47
- P48
- P49
- P50
- P51
- P52
- P53
- P54
- P55
- P56
- P57
- P58
- P59
- P60
- P61
- P62
- P63
- P64
- P65
- P66
- P67
- P68
- P69
- P70
- P71
- P72
- P73
- P74
- P75
- P76
- P77
- P78
- P79
- P80
- P81
- P82
- P83
- P84
- P85
- P86
- P87
- P88
- P89
- P90
- P91
- P92
- P93
- P94
- P95
- P96
- P97
- P98
- P99
- P100
- P101
- P102
- P103
- P104
- P105
