型号 功能描述 生产厂家 企业 LOGO 操作
DM74LS109A

Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t

Fairchild

仙童半导体

DM74LS109A

Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs

文件:135 Kbytes Page:6 Pages

NSC

国半

Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t

Fairchild

仙童半导体

Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t

Fairchild

仙童半导体

Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t

Fairchild

仙童半导体

Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs

文件:135 Kbytes Page:6 Pages

NSC

国半

Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs

文件:135 Kbytes Page:6 Pages

NSC

国半

Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs

文件:135 Kbytes Page:6 Pages

NSC

国半

封装/外壳:16-DIP(0.300",7.62mm) 功能:设置(预设)和复位 包装:管件 描述:IC FF JK TYPE DUAL 1BIT 16DIP 集成电路(IC) 触发器

ONSEMI

安森美半导体

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability

TI

德州仪器

LOW POWER SCHOTTKY

LOW POWER SCHOTTKY The SN74LS109A consists of two high speed completely independent transition clocked JKflip-flops.

ONSEMI

安森美半导体

替换型号 功能描述 生产厂家 企业 LOGO 操作

Dual J-K Positive-edge-triggered Flip-Flops(with Preset and Clear)

HitachiHitachi Semiconductor

日立日立公司

Ouadruple 2-input Positive NAND Gates

HitachiHitachi Semiconductor

日立日立公司

LOW POWER SCHOTTKY

ONSEMI

安森美半导体

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

TI

德州仪器

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

TI

德州仪器

LOW POWER SCHOTTKY

ONSEMI

安森美半导体

DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP

Motorola

摩托罗拉

DM74LS109A产品属性

  • 类型

    描述

  • 型号

    DM74LS109A

  • 制造商

    Fairchild Semiconductor Corporation

更新时间:2025-11-19 15:17:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
NSC
25+
10
公司优势库存 热卖中!!
FSC/MOT
25+
DIP16
30000
代理全新原装现货,价格优势
onsemi(安森美)
24+
SOEIAJ16
2669
只做原装,提供一站式配单服务,代工代料。BOM配单
FAIRCILD
22+
DIP-16
8000
原装正品支持实单
FAIRCHILD/仙童
24+
NA/
18250
原装现货,当天可交货,原型号开票
FSC
1645+
SOP
7500
只做原装进口,假一罚十
FAIRCHILD/仙童
23+
SOP16
3000
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、
HARRIS
2447
DIP
100500
一级代理专营品牌!原装正品,优势现货,长期排单到货
ON Semiconductor
23+
16-DIP0.300,7.62mm
7300
专注配单,只做原装进口现货
NATIONALSEMI
05+
原厂原装
6152
只做全新原装真实现货供应

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