型号 功能描述 生产厂家&企业 LOGO 操作
DM74LS109A

Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

DM74LS109A

Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs

文件:135 Kbytes Page:6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs

General Description This device contains two independent positive-edge-triggered J-K flip-flops with complementary outputs. The J and K data is accepted by the flip-flop on the rising edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition t

FairchildFairchild Semiconductor

仙童半导体飞兆/仙童半导体公司

Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs

文件:135 Kbytes Page:6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs

文件:135 Kbytes Page:6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs

文件:135 Kbytes Page:6 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

封装/外壳:16-DIP(0.300",7.62mm) 功能:设置(预设)和复位 包装:管件 描述:IC FF JK TYPE DUAL 1BIT 16DIP 集成电路(IC) 触发器

ONSEMI

安森美半导体

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability

TI1

德州仪器

LOW POWER SCHOTTKY

LOW POWER SCHOTTKY The SN74LS109A consists of two high speed completely independent transition clocked JKflip-flops.

ONSEMI

安森美半导体

替换型号 功能描述 生产厂家&企业 LOGO 操作

Dual J-K Positive-edge-triggered Flip-Flops(with Preset and Clear)

HitachiHitachi Semiconductor

日立日立公司

Ouadruple 2-input Positive NAND Gates

HitachiHitachi Semiconductor

日立日立公司

LOW POWER SCHOTTKY

ONSEMI

安森美半导体

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

TI

德州仪器

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

TI

德州仪器

LOW POWER SCHOTTKY

ONSEMI

安森美半导体

DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP

Motorola

摩托罗拉

DM74LS109A产品属性

  • 类型

    描述

  • 型号

    DM74LS109A

  • 制造商

    Fairchild Semiconductor Corporation

更新时间:2025-8-18 9:17:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
NATIONALSEMI
05+
原厂原装
6152
只做全新原装真实现货供应
FAIR
24+/25+
55
原装正品现货库存价优
onsemi
25+
16-PDIP
9350
独立分销商 公司只做原装 诚心经营 免费试样正品保证
FSC/ON
23+
原包装原封 □□
5147
原装进口特价供应 特价,原装元器件供应,支持开发样品 更多详细咨询 库存
24+
N/A
52000
一级代理-主营优势-实惠价格-不悔选择
FSC
24+
DIPSOP
65200
一级代理/放心采购
FAIRCILD
22+
DIP-16
8000
原装正品支持实单
NS
2020+
DIP
433
百分百原装正品 真实公司现货库存 本公司只做原装 可
onsemi(安森美)
24+
SOEIAJ16
2669
只做原装,提供一站式配单服务,代工代料。BOM配单
NS
24+
DIP
33487
郑重承诺只做原装进口现货

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