36-Mbit DDR II SRAM 2-Word Burst Architecture

Functional Description The CY7C1416KV18, CY7C1427KV18, CY7C1418KV18, and CY7C1420KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 36-Mbit density

36-Mbit DDR II SRAM 2-Word Burst Architecture

Functional Description The CY7C1416KV18, CY7C1427KV18, CY7C1418KV18, and CY7C1420KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 36-Mbit density

36-Mbit DDR II SRAM 2-Word Burst Architecture

Functional Description The CY7C1416KV18, CY7C1427KV18, CY7C1418KV18, and CY7C1420KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 36-Mbit density

36-Mbit DDR II SRAM 2-Word Burst Architecture

Functional Description The CY7C1416KV18, CY7C1427KV18, CY7C1418KV18, and CY7C1420KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 36-Mbit density

36-Mbit DDR II SRAM 2-Word Burst Architecture

Functional Description The CY7C1416KV18, CY7C1427KV18, CY7C1418KV18, and CY7C1420KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 36-Mbit density

36-Mbit DDR II SRAM 2-Word Burst Architecture

Functional Description The CY7C1416KV18, CY7C1427KV18, CY7C1418KV18, and CY7C1420KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 36-Mbit density

36-Mbit DDR II SRAM 2-Word Burst Architecture

Functional Description The CY7C1416KV18, CY7C1427KV18, CY7C1418KV18, and CY7C1420KV18 are 1.8 V synchronous pipelined SRAM equipped with DDR II architecture. The DDR II consists of an SRAM core with advanced synchronous peripheral circuitry and a 1-bit burst counter. Features ■ 36-Mbit density

36-Mbit DDR II SRAM Two-Word Burst Architecture

文件：1.23604 Mbytes Page：31 Pages

封装/外壳：165-LBGA 包装：散装 描述：IC SRAM 36MBIT PARALLEL 165FBGA 集成电路（IC） 存储器

双倍数据速率 (DDR) 同步 SRAM

封装/外壳：165-LBGA 包装：托盘 描述：IC SRAM 36MBIT PARALLEL 165FBGA 集成电路（IC） 存储器

双倍数据速率 (DDR) 同步 SRAM

双倍数据速率 (DDR) 同步 SRAM