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CY7C1325价格
参考价格：￥23.2872
型号：CY7C1325G-133AXC 品牌：Cynergy 3 备注：这里有CY7C1325多少钱，2026年最近7天走势，今日出价，今日竞价，CY7C1325批发/采购报价，CY7C1325行情走势销售排行榜，CY7C1325报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
CY7C1325 | 256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325 is a 3.3V 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 |   | |
CY7C1325 | 256K x 18 Synchronous 3.3V Cache RAM | INFINEON 英飞凌 | | |
256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325 is a 3.3V 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325 is a 3.3V 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325 is a 3.3V 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325 is a 3.3V 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325B is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325B is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325B is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325B is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325B is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
256K x 18 Synchronous 3.3V Cache RAM Functional Description The CY7C1325B is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and incre | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM Functional Description[1] The CY7C1325G is a 256 K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and incremen | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256 K 횞 18) Flow-Through Sync SRAM Functional Description The CY7C1325H is a 256 K × 18 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2 bit on-chip counter captures the first address in a burst and increments | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256 K 횞 18) Flow-Through Sync SRAM Functional Description The CY7C1325H is a 256 K × 18 synchronous cache RAM designed to interface with high speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133 MHz version). A 2 bit on-chip counter captures the first address in a burst and increments | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
18-Mbit QDR짰 II SRAM 2-Word Burst Architecture 文件：890.82 Kbytes Page：32 Pages | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mb (256K x 18) Flow-Through Sync SRAM 文件：430.81 Kbytes Page：17 Pages | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mb (256K x 18) Flow-Through Sync SRAM 文件：430.81 Kbytes Page：17 Pages | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256 K x 18) Flow through Sync SRAM Synchronous self timed write 文件：805.37 Kbytes Page：21 Pages | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256K x 18) Flow-Through Sync SRAM | INFINEON 英飞凌 | | ||
4-Mbit (256 K x 18) Flow through Sync SRAM Synchronous self timed write 文件：805.37 Kbytes Page：21 Pages | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256 K 횞 18) Flow-Through Sync SRAM 文件：753.02 Kbytes Page：22 Pages | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256 K x 18) Flow-Through Sync SRAM 文件：769.9 Kbytes Page：23 Pages | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
IC SRAM 4.5M PARALLEL 100TQFP | INFINEON 英飞凌 | | ||
封装/外壳：100-LQFP 包装：卷带（TR） 描述：IC SRAM 4.5MBIT PARALLEL 100TQFP 集成电路（IC） 存储器 | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
封装/外壳：100-LQFP 包装：卷带（TR） 描述：IC SRAM 4.5MBIT PARALLEL 100TQFP 集成电路（IC） 存储器 | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256 K x 18) Flow through Sync SRAM Synchronous self timed write 文件：805.37 Kbytes Page：21 Pages | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256 K x 18) Flow-Through Sync SRAM 文件：769.9 Kbytes Page：23 Pages | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | | ||
4-Mbit (256 K 횞 18) Flow-Through Sync SRAM 文件：753.02 Kbytes Page：22 Pages | CYPRESSCypress Semiconductor 赛普拉斯赛普拉斯半导体公司 | |
CY7C1325产品属性
- 类型
描述
- 型号
CY7C1325
- 制造商
Cypress Semiconductor
- 功能描述
256K X 18 CACHE SRAM, 8 ns, PQFP100
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
CYPRESS |
23+ |
TQFP-100 |
3600 |
原装正品假一罚百!可开增票! |
|||
CYPRESS |
2023+ |
3000 |
进口原装现货 |
||||
CYPRESS |
2138+ |
QFP |
8960 |
专营BGA,QFP原装现货,假一赔十 |
|||
CYPRESS/赛普拉斯 |
22+ |
TQFP100 |
12245 |
现货,原厂原装假一罚十! |
|||
CYPRESS |
23+ |
QFP100 |
8560 |
受权代理!全新原装现货特价热卖! |
|||
CYPRESS |
2016+ |
QFP100 |
5500 |
只做原装,假一罚十,公司可开17%增值税发票! |
|||
CYPRESS(赛普拉斯) |
25+ |
LQFP-100 |
14093 |
正规渠道,大量现货,只等你来。 |
|||
Texas Instruments |
25+ |
TQFP-100 |
18000 |
TI优势渠道,大量原装库存现货,交期快,欢迎询价。 |
|||
Cypress Semiconductor Corp |
24+25+ |
16500 |
全新原厂原装现货!受权代理!可送样可提供技术支持! |
||||
CYPRESS/赛普拉斯 |
2308+ |
TQFP100 |
4580 |
十年专业专注 优势渠道商正品保证公司现货 |
CY7C1325规格书下载地址
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