1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

文件：198.19 Kbytes Page：13 Pages

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

文件：182.89 Kbytes Page：12 Pages

1Line to 10Line Clock Driver

文件：500.93 Kbytes Page：14 Pages

具有 I2C 控制接口的 1 线路至 18 线路时钟驱动器

1Line to 10Line Clock Driver

文件：500.93 Kbytes Page：14 Pages

1Line to 10Line Clock Driver

文件：500.93 Kbytes Page：14 Pages

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

文件：182.89 Kbytes Page：12 Pages

1Line to 10Line Clock Driver

文件：500.93 Kbytes Page：14 Pages

封装/外壳：48-BSSOP（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:18 100MHZ 48SSOP 集成电路（IC） 时钟缓冲器，驱动器

1Line to 10Line Clock Driver

文件：500.93 Kbytes Page：14 Pages

封装/外壳：48-BSSOP（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CLK BUFFER 1:18 100MHZ 48SSOP 集成电路（IC） 时钟缓冲器，驱动器

1Line to 10Line Clock Driver

文件：500.93 Kbytes Page：14 Pages

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

文件：198.19 Kbytes Page：13 Pages

1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE

文件：198.19 Kbytes Page：13 Pages

Digital Camera LCD Product Line Features Low Power and Digital Interface Support

Coming Soon. If you have some information on related parts, please share useful information by adding links below.

Label format - Old format order code cross reference

文件：3.00256 Mbytes Page：48 Pages

Label format - Old format order code cross reference

文件：3.00256 Mbytes Page：48 Pages

SAW Filter

文件：134.49 Kbytes Page：3 Pages

true one-port, surface-acoustic-wave (SAW) resonator

文件：62.82 Kbytes Page：3 Pages