1-LINE TO 18-LINE CLOCK DRIVER WITH 12C CONTROL INTERFACE

High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps Supports up to Four Unbuffered SDRAM Dual Inline Memory Modules (DIMMs) I2C Serial Interface Provides Individual En

封装/外壳：48-BSSOP（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 1:18 100MHZ 48SSOP 集成电路（IC） 时钟缓冲器，驱动器

1Line to 10Line Clock Driver

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