丝印代码：CD74HCT393E；CDx4HC393, CDx4HCT393 High-Speed CMOS Logic Dual 4-Stage Binary Counter

1 Features • Fully static operation • Buffered inputs • Common reset • Negative-edge clocking • Fanout (over temperature range): – Standard outputs 10 LSTTL loads – Bus driver outputs 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay and transiti

丝印代码：CD74HCT393E；CDx4HC393, CDx4HCT393 High-Speed CMOS Logic Dual 4-Stage Binary Counter

1 Features • Fully static operation • Buffered inputs • Common reset • Negative-edge clocking • Fanout (over temperature range): – Standard outputs 10 LSTTL loads – Bus driver outputs 15 LSTTL loads • Wide operating temperature range: –55℃ to 125℃ • Balanced propagation delay and transiti

封装/外壳：14-DIP（0.300"，7.62mm） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC DUAL 4-STG BIN COUNTER 14-DIP 集成电路（IC） 计数器，除法器

High Speed CMOS Logic Dual 4 -Stage Binary Counter

High Speed CMOS Logic Dual 4 -Stage Binary Counter

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High-Speed CMOS Logic Dual 4-Stage Binary Counter

文件：445.76 Kbytes Page：15 Pages

High-Speed CMOS Logic Dual 4-Stage Binary Counter

文件：416.14 Kbytes Page：15 Pages

High Speed CMOS Logic Dual 4 -Stage Binary Counter

文件：38.4 Kbytes Page：8 Pages

High-Speed CMOS Logic Dual 4-Stage Binary Counter

文件：266.41 Kbytes Page：13 Pages

High-Speed CMOS Logic Dual 4-Stage Binary Counter

文件：266.41 Kbytes Page：13 Pages

High-Speed CMOS Logic Dual 4-Stage Binary Counter

文件：416.14 Kbytes Page：15 Pages

DUAL 4-BIT BINARY RIPPLE COUNTER

Dual 4-bit binary ripple counter

Dual 4-bit binary ripple counter

1. General description The 74HC393; 74HCT393 is a dual 4-stage binary ripple counter. Each counter features a clock input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on

Dual 4-bit binary ripple counter

GENERAL DESCRIPTION The 74HC/HCT393 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT393 are 4-bit binary ripple counters with separate clocks (1CP and 2 CP) and master reset (

Dual 4-bit binary ripple counter

1. General description The 74HC393; 74HCT393 is a dual 4-stage binary ripple counter. Each counter features a clock input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on