CD74HCT109价格

参考价格:¥2.3067

型号:CD74HCT109E 品牌:Texas 备注:这里有CD74HCT109多少钱,2025年最近7天走势,今日出价,今日竞价,CD74HCT109批发/采购报价,CD74HCT109行情走势销售排行榜,CD74HCT109报价。
型号 功能描述 生产厂家 企业 LOGO 操作
CD74HCT109

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

TI

德州仪器

CD74HCT109

具有设置和复位端的高速 CMOS 逻辑双路正边沿触发式 J-K 触发器

TI

德州仪器

CD74HCT109

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:279.59 Kbytes Page:12 Pages

TI

德州仪器

CD74HCT109

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

CD74HCT109

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:58.14 Kbytes Page:8 Pages

TI

德州仪器

CD74HCT109

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:279.59 Kbytes Page:12 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:279.59 Kbytes Page:12 Pages

TI

德州仪器

封装/外壳:16-SOIC(0.154",3.90mm 宽) 功能:设置(预设)和复位 包装:管件 描述:IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路(IC) 触发器

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

封装/外壳:16-SOIC(0.154",3.90mm 宽) 功能:设置(预设)和复位 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路(IC) 触发器

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:279.59 Kbytes Page:12 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:279.59 Kbytes Page:12 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:347.95 Kbytes Page:16 Pages

TI

德州仪器

Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

文件:454.62 Kbytes Page:15 Pages

TI

德州仪器

Dual JK flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP)

Philips

飞利浦

Dual JK flip-flop with set and reset; positive-edge-trigger

1. General description The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of

NEXPERIA

安世

Dual JK flip-flop with set and reset; positive-edge-trigger

1. General description The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of

NEXPERIA

安世

Dual JK flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP)

Philips

飞利浦

Dual JK flip-flop with set and reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT109 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT109 are dual positive-edge triggered, JK flip-flops with individual J, K inputs, clock (CP)

Philips

飞利浦

CD74HCT109产品属性

  • 类型

    描述

  • 型号

    CD74HCT109

  • 功能描述

    触发器 Dual

  • RoHS

  • 制造商

    Texas Instruments

  • 电路数量

    2

  • 逻辑系列

    SN74

  • 逻辑类型

    D-Type Flip-Flop

  • 极性

    Inverting, Non-Inverting

  • 输入类型

    CMOS

  • 传播延迟时间

    4.4 ns

  • 高电平输出电流

    - 16 mA

  • 低电平输出电流

    16 mA

  • 电源电压-最大

    5.5 V

  • 最大工作温度

    + 85 C

  • 安装风格

    SMD/SMT

  • 封装/箱体

    X2SON-8

  • 封装

    Reel

更新时间:2025-12-25 23:01:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
TI(德州仪器)
24+
SOP16
935
只做原装,提供一站式配单服务,代工代料。BOM配单
TI(德州仪器)
24+
SOP16
1504
原装现货,免费供样,技术支持,原厂对接
TI
25+
DIP16
209
原装正品,假一罚十!
TEXASINSTRUMENTS
24+
DIP-16
6800
100%原装进口现货,欢迎来电咨询
TI
23+
16-DIP
65600
TI/德州仪器
23+
SOIC16
25000
正规渠道,只有原装!
TI/德州仪器
25+
原厂封装
10280
原厂授权代理,专注军工、汽车、医疗、工业、新能源!
CD74HCT109E
25+
65
65
HAR
2015+
SOP/DIP
19889
一级代理原装现货,特价热卖!
TI
25+23+
DIP16
48835
绝对原装正品现货,全新深圳原装进口现货

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