High Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker

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9-bit odd/even parity generator/checker

GENERAL DESCRIPTION The 74HC/HCT280 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Word-length easily expanded by cascading • Similar pin configuration to the “180” for

9-bit odd/even parity generator/checker

GENERAL DESCRIPTION The 74HC/HCT280 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Word-length easily expanded by cascading • Similar pin configuration to the “180” for

9-bit Odd/Even Parity Generator/Checker

Description This parity generator/checker features odd/even outputs to facilitate operation of either odd or even parity applications. The word length capability is easily expanded by cascading devices. Features • High Speed Operation: tpd (Data to Even or Odd) = 22 ns typ (C L = 50 pF) • High

9 BIT PARITY GENERATOR

DESCRIPTION The M54/74HC280 is a high speed CMOS 9-BIT PARITY GENERATOR fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low consumption. ■ HIGH SPEED tPD = 22 ns (TYP.) at VCC = 5 V ■ LOW POWER DISSIPATION ICC =