位置：首页 > IC中文资料第11084页 > CD74ACT10
CD74ACT10价格
参考价格：￥1.4699
型号：CD74ACT109E 品牌：TI 备注：这里有CD74ACT10多少钱，2025年最近7天走势，今日出价，今日竞价，CD74ACT10批发/采购报价，CD74ACT10行情走势销售排行榜，CD74ACT10报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
CD74ACT10 | TRIPLE 3-INPUT POSITIVE-NAND GATES Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 |   | |
CD74ACT10 | 具有 TTL 兼容型 CMOS 输入的 3 通道、3 输入、4.5V 至 5.5V 与非门 | TI 德州仪器 | | |
CD74ACT10 | Triple 3-Input NAND Gate 文件：29.45 Kbytes Page：5 Pages | TI 德州仪器 | | |
CD74ACT10 | TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：806.69 Kbytes Page：12 Pages | TI 德州仪器 | | |
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current – Fanout to 15 F Devices SCR Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：806.69 Kbytes Page：12 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：349.71 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：337.77 Kbytes Page：10 Pages | TI 德州仪器 | | ||
Dual j-k Flip-Flop with Set and Reset 文件：228.31 Kbytes Page：8 Pages | TI 德州仪器 | | ||
具有设置和复位端的双路正边沿触发式 J-K 触发器 | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：337.77 Kbytes Page：10 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：349.71 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：337.77 Kbytes Page：10 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：349.71 Kbytes Page：11 Pages | TI 德州仪器 | | ||
封装/外壳：16-DIP（0.300"，7.62mm） 功能：设置（预设）和复位 包装：卷带（TR） 描述：IC FF JK TYPE DUAL 1BIT 16DIP 集成电路（IC） 触发器 | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：349.71 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：337.77 Kbytes Page：10 Pages | TI 德州仪器 | | ||
封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF JK TYPE DUAL 1BIT 16SOIC 集成电路（IC） 触发器 | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：337.77 Kbytes Page：10 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：349.71 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：349.71 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：337.77 Kbytes Page：10 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：349.71 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：349.71 Kbytes Page：11 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：337.77 Kbytes Page：10 Pages | TI 德州仪器 | | ||
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 文件：349.71 Kbytes Page：11 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：806.69 Kbytes Page：12 Pages | TI 德州仪器 | | ||
Triple 3-Input NAND Gate 文件：29.45 Kbytes Page：5 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：806.69 Kbytes Page：12 Pages | TI 德州仪器 | | ||
Triple 3-Input NAND Gate 文件：29.45 Kbytes Page：5 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：806.69 Kbytes Page：12 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：806.69 Kbytes Page：12 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：806.69 Kbytes Page：12 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT POSITIVE-NAND GATES 文件：806.69 Kbytes Page：12 Pages | TI 德州仪器 | | ||
TRIPLE 3-INPUT NAND GATE DESCRIPTION The 74ACT10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The d | STMICROELECTRONICS 意法半导体 | | ||
TRIPLE 3-INPUT NAND GATE DESCRIPTION The 74ACT10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The d | STMICROELECTRONICS 意法半导体 | | ||
TRIPLE 3-INPUT NAND GATE DESCRIPTION The 74ACT10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. The d | STMICROELECTRONICS 意法半导体 | | ||
Triple 3-Input NAND Gate General Description The AC/ACT10 contains three, 3-input NAND gates. Features ■ ICC reduced by 50 on 74AC only ■ Outputs source/sink 24mA | Fairchild 仙童半导体 | | ||
Triple 3-Input NAND Gate 文件：102.64 Kbytes Page：7 Pages | Fairchild 仙童半导体 | |
CD74ACT10产品属性
- 类型
描述
- 型号
CD74ACT10
- 制造商
TI
- 制造商全称
Texas Instruments
- 功能描述
Triple 3-Input NAND Gate
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
TI/德州仪器 |
24+ |
SOP-16 |
6000 |
全新原装深圳仓库现货有单必成 |
|||
TI/德州仪器 |
25+ |
原厂封装 |
10280 |
||||
TI/德州仪器 |
24+ |
SOIC-16 |
9600 |
原装现货,优势供应,支持实单! |
|||
RCA |
23+ |
DIP-14 |
10000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
|||
TI/德州仪器 |
23+ |
SOP-16 |
12700 |
买原装认准中赛美 |
|||
TI |
三年内 |
1983 |
只做原装正品 |
||||
24+ |
N/A |
60000 |
一级代理-主营优势-实惠价格-不悔选择 |
||||
Harris |
25+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
||||
RCA |
23+ |
DIP-14 |
50000 |
全新原装正品现货,支持订货 |
|||
HARRIS |
24+ |
SOP-143.9mm |
159 |
CD74ACT10规格书下载地址
CD74ACT10参数引脚图相关
- d402
- d325
- d2007
- d2004
- d2002
- d126
- d1004
- d1002
- c波段
- cw7805
- cs5532
- cs1
- cpld
- cp10
- connector
- cob
- cmos传感器
- cmos
- cm2006
- cicret
- CD821
- CD81000
- CD80C88
- CD80C86
- CD804ZM
- CD801ZP
- CD77-1B
- CD7613
- CD759A
- CD758A
- CD757A
- CD756A
- CD755A
- CD754A
- CD753A
- CD752A
- CD7522
- CD751A
- CD750A
- CD75_13
- CD74ACT14M96
- CD74ACT14M
- CD74ACT14E
- CD74ACT139M96E4
- CD74ACT139M96
- CD74ACT139M
- CD74ACT139E
- CD74ACT138ME4
- CD74ACT138M96
- CD74ACT138M
- CD74ACT138E
- CD74ACT112M96
- CD74ACT112M
- CD74ACT10M96
- CD74ACT10M
- CD74ACT10E
- CD74ACT109M96
- CD74ACT109M
- CD74ACT109EE4
- CD74ACT109E
- CD74ACT08M96
- CD74ACT08M
- CD74ACT08E
- CD74ACT05M96
- CD74ACT05M
- CD74ACT05EE4
- CD74ACT05E
- CD74ACT04ME4
- CD74ACT04M96
- CD74ACT04M
- CD74ACT04E
- CD74ACT02M96E4
- CD74ACT02M96
- CD74ACT02M
- CD74ACT02EE4
- CD74ACT02E
- CD74ACT00M96
- CD74ACT00M
- CD74ACT00E
- CD74AC86M96
- CD749A
- CD748A
- CD747A
- CD746A
- CD73_13
- CD71NP
- CD71HNH
- CD71CNC
- CD71003
- CD70HQG
- CD-700
- CD6C60S
- CD6916
- CD6858
- CD6857
- CD6761
- CD6760
- CD6759
- CD6677
- CD6676
CD74ACT10数据表相关新闻
CD74HC259MT
CD74HC259MT
2023-10-18CD74HC123PWR
CD74HC123PWR
2022-12-9CD74HC125M
进口代理
2022-8-23CD74AC153全新原装现货
CD74AC153，全新原装现货0755-82732291当天发货或门市自取.
2020-12-28CD54HCT4060F3A
M74HC4094计数器移位寄存器，SOP-16计数器移位寄存器，8位计数器移位寄存器，74HC移位寄存器计数器移位寄存器，并行至串行计数器移位寄存器，4位计数器移位寄存器
2020-7-21CD54HCT541F3A
热门搜索： 74HC CMOS缓冲器和线路驱动器，SC70-6 SMD / SMT + 125 C-55 C同相缓冲器和线路驱动器，2输入2输出同相5.5 V 4.5 V缓冲器和线路驱动器，4输入4输出-32 mA缓冲器和线路驱动器，16输入16输出缓冲器和线路驱动器，10 uA 2输入2输出-32 mA 32 mA缓冲器和线路驱动器
2020-7-17
DdatasheetPDF页码索引
- P1
- P2
- P3
- P4
- P5
- P6
- P7
- P8
- P9
- P10
- P11
- P12
- P13
- P14
- P15
- P16
- P17
- P18
- P19
- P20
- P21
- P22
- P23
- P24
- P25
- P26
- P27
- P28
- P29
- P30
- P31
- P32
- P33
- P34
- P35
- P36
- P37
- P38
- P39
- P40
- P41
- P42
- P43
- P44
- P45
- P46
- P47
- P48
- P49
- P50
- P51
- P52
- P53
- P54
- P55
- P56
- P57
- P58
- P59
- P60
- P61
- P62
- P63
- P64
- P65
- P66
- P67
- P68
- P69
- P70
- P71
- P72
- P73
- P74
- P75
- P76
- P77
- P78
- P79
- P80
- P81
- P82
- P83
- P84
- P85
- P86
- P87
- P88
- P89
- P90
- P91
- P92
- P93
- P94
- P95
- P96
- P97
- P98
- P99
- P100
- P101
- P102
- P103
- P104
- P105
- P106
- P107
