ADN466价格

参考价格:¥6.1123

型号:ADN4661BRZ 品牌:Analog 备注:这里有ADN466多少钱,2025年最近7天走势,今日出价,今日竞价,ADN466批发/采购报价,ADN466行情走势销售排行榜,ADN466报价。
型号 功能描述 生产厂家 企业 LOGO 操作

LVDS and M-LVDS Circuit Implementation Guide

INTRODUCTION Low voltage differential signaling (LVDS) is a standard for communicating at high speed in point-to-point applications. Multipoint LVDS (M-LVDS) is a similar standard for multipoint applications. Both LVDS and M-LVDS use differential signaling, a two-wire communication method where r

AD

亚德诺

Single, 3 V, CMOS, LVDS, High Speed Differential Driver

GENERAL DESCRIPTION The ADN4661 is a single, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz) and ultra-low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device ac

AD

亚德诺

Single, 3 V, CMOS, LVDS, High Speed Differential Driver

GENERAL DESCRIPTION The ADN4661 is a single, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz) and ultra-low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device ac

AD

亚德诺

Single, 3 V, CMOS, LVDS, High Speed Differential Driver

GENERAL DESCRIPTION The ADN4661 is a single, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz) and ultra-low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

Single, 3 V, CMOS, LVDS, High Speed Differential Driver

GENERAL DESCRIPTION The ADN4661 is a single, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz) and ultra-low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device ac

AD

亚德诺

Single, 3 V, CMOS, LVDS, High Speed Differential Driver

GENERAL DESCRIPTION The ADN4661 is a single, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz) and ultra-low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

Single, 3 V, CMOS, LVDS, High Speed Differential Driver

GENERAL DESCRIPTION The ADN4661 is a single, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz) and ultra-low power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

Single, 3 V, CMOS, LVDS Differential Line Receiver

GENERAL DESCRIPTION The ADN4662 is a single, CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz), and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device

AD

亚德诺

LVDS and M-LVDS Circuit Implementation Guide

INTRODUCTION Low voltage differential signaling (LVDS) is a standard for communicating at high speed in point-to-point applications. Multipoint LVDS (M-LVDS) is a similar standard for multipoint applications. Both LVDS and M-LVDS use differential signaling, a two-wire communication method where r

AD

亚德诺

Single, 3 V, CMOS, LVDS Differential Line Receiver

GENERAL DESCRIPTION The ADN4662 is a single, CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz), and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device

AD

亚德诺

Single, 3 V, CMOS, LVDS Differential Line Receiver

GENERAL DESCRIPTION The ADN4662 is a single, CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz), and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device

AD

亚德诺

LVDS and M-LVDS Circuit Implementation Guide

INTRODUCTION Low voltage differential signaling (LVDS) is a standard for communicating at high speed in point-to-point applications. Multipoint LVDS (M-LVDS) is a similar standard for multipoint applications. Both LVDS and M-LVDS use differential signaling, a two-wire communication method where r

AD

亚德诺

High Speed Differential Driver

GENERAL DESCRIPTION The ADN4663 is a dual, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz), and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. FEATURES ±1

AD

亚德诺

Dual, 3 V, CMOS, LVDS High Speed Differential Driver

GENERAL DESCRIPTION The ADN4663 is a dual, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz), and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. FEATURES ±1

AD

亚德诺

Dual, 3 V, CMOS, LVDS High Speed Differential Driver

GENERAL DESCRIPTION The ADN4663 is a dual, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 600 Mbps (300 MHz), and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. FEATURES ±1

AD

亚德诺

LVDS and M-LVDS Circuit Implementation Guide

INTRODUCTION Low voltage differential signaling (LVDS) is a standard for communicating at high speed in point-to-point applications. Multipoint LVDS (M-LVDS) is a similar standard for multipoint applications. Both LVDS and M-LVDS use differential signaling, a two-wire communication method where r

AD

亚德诺

Dual, 3 V, CMOS, LVDS Differential Line Receiver

GENERAL DESCRIPTION The ADN4664 is a dual, CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device acc

AD

亚德诺

Dual, 3 V, CMOS, LVDS Differential Line Receiver

GENERAL DESCRIPTION The ADN4664 is a dual, CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device acc

AD

亚德诺

Dual, 3 V, CMOS, LVDS Differential Line Receiver

GENERAL DESCRIPTION The ADN4664 is a dual, CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals. The device acc

AD

亚德诺

3 V, LVDS, Quad, CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4665 is a quad-channel, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. FEATURES ±15 kV ESD protection on output pins 400 Mbps (200 MHz) switching rates 100 ps typ

AD

亚德诺

LVDS and M-LVDS Circuit Implementation Guide

INTRODUCTION Low voltage differential signaling (LVDS) is a standard for communicating at high speed in point-to-point applications. Multipoint LVDS (M-LVDS) is a similar standard for multipoint applications. Both LVDS and M-LVDS use differential signaling, a two-wire communication method where r

AD

亚德诺

3 V, LVDS, Quad, CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4665 is a quad-channel, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. FEATURES ±15 kV ESD protection on output pins 400 Mbps (200 MHz) switching rates 100 ps typ

AD

亚德诺

3 V, LVDS, Quad, CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4665 is a quad-channel, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. FEATURES ±15 kV ESD protection on output pins 400 Mbps (200 MHz) switching rates 100 ps typ

AD

亚德诺

3 V, LVDS, Quad, CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4665 is a quad-channel, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. FEATURES ±15 kV ESD protection on output pins 400 Mbps (200 MHz) switching rates 100 ps typ

AD

亚德诺

3 V, LVDS, Quad, CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4665 is a quad-channel, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. FEATURES ±15 kV ESD protection on output pins 400 Mbps (200 MHz) switching rates 100 ps typ

AD

亚德诺

3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

AD

亚德诺

LVDS and M-LVDS Circuit Implementation Guide

INTRODUCTION Low voltage differential signaling (LVDS) is a standard for communicating at high speed in point-to-point applications. Multipoint LVDS (M-LVDS) is a similar standard for multipoint applications. Both LVDS and M-LVDS use differential signaling, a two-wire communication method where r

AD

亚德诺

3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

AD

亚德诺

3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

AD

亚德诺

3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

AD

亚德诺

3 V, LVDS, Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

LVDS and M-LVDS Circuit Implementation Guide

INTRODUCTION Low voltage differential signaling (LVDS) is a standard for communicating at high speed in point-to-point applications. Multipoint LVDS (M-LVDS) is a similar standard for multipoint applications. Both LVDS and M-LVDS use differential signaling, a two-wire communication method where r

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. The device accep

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. The device accep

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. The device accep

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. The device accep

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. The device accep

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. The device accep

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. The device accep

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Driver

GENERAL DESCRIPTION The ADN4667 is a quad, CMOS, low voltage differential signaling (LVDS) line driver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pinout for easy PCB layout and separation of input and output signals. FEATURES

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pin configuration for easy PCB layout and separation of input and output signal

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pin configuration for easy PCB layout and separation of input and output sign

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pin configuration for easy PCB layout and separation of input and output sign

AD

亚德诺

LVDS and M-LVDS Circuit Implementation Guide

INTRODUCTION Low voltage differential signaling (LVDS) is a standard for communicating at high speed in point-to-point applications. Multipoint LVDS (M-LVDS) is a similar standard for multipoint applications. Both LVDS and M-LVDS use differential signaling, a two-wire communication method where r

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pin configuration for easy PCB layout and separation of input and output signal

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pin configuration for easy PCB layout and separation of input and output signal

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pin configuration for easy PCB layout and separation of input and output sign

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pin configuration for easy PCB layout and separation of input and output sign

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pin configuration for easy PCB layout and separation of input and output sign

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pin configuration for easy PCB layout and separation of input and output signal

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pin configuration for easy PCB layout and separation of input and output sign

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pin configuration for easy PCB layout and separation of input and output signal

AD

亚德诺

3 V LVDS Quad CMOS Differential Line Receiver

GENERAL DESCRIPTION The ADN4668 is a quad-channel CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow through pin configuration for easy PCB layout and separation of input and output sign

AD

亚德诺

ADN466产品属性

  • 类型

    描述

  • 型号

    ADN466

  • 制造商

    AD

  • 制造商全称

    Analog Devices

  • 功能描述

    LVDS and M-LVDS Circuit Implementation Guide

更新时间:2025-12-26 23:01:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
ADI/亚德诺
24+
NA/
7016
原装现货,当天可交货,原型号开票
AD
2016+
TSSOP16
3766
只做原装,假一罚十,公司可开17%增值税发票!
ADI/亚德诺
22+
TSSOP16
100000
代理渠道/只做原装/可含税
ADI
19+
TSSOP16
2303
一级代理,专注军工、汽车、医疗、工业、新能源、电力
ADI/亚德诺
20+
TSSOP16
52880
ADI原装主营-可开原型号增税票
AnalogDevices
16SSOP
3000
AD代理旗下一级分销商,主营AD全系列产品
ADI(亚德诺)
23+
NA
20094
正纳10年以上分销经验原装进口正品做服务做口碑有支持
ADI/亚德诺
25+
TSSOP-16
880000
明嘉莱只做原装正品现货
ADI/亚德诺
21+
TSSOP16
3500
百域芯优势 实单必成 可开13点增值税发票
AD
25+
TSSOP
3000
全新原装、诚信经营、公司现货销售!

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