丝印代码：AC16；SN74AC16 Hex Inverters With Schmitt-Trigger Inputs and Open-Drain Outputs

1 Features • Wide operating range of 1.5V to 6V • Continuous 24mA output drive at 5V • Supports up to 75mA output drive at 5V in short bursts • All inputs and outputs include positive and negative clamp diodes • Output clamp diodes provide protection for driving inductive loads such as rel

丝印代码：AC16；SN74AC16 Hex Inverters With Schmitt-Trigger Inputs and Open-Drain Outputs

1 Features • Wide operating range of 1.5V to 6V • Continuous 24mA output drive at 5V • Supports up to 75mA output drive at 5V in short bursts • All inputs and outputs include positive and negative clamp diodes • Output clamp diodes provide protection for driving inductive loads such as rel

Circuit Protection Solutions Low Voltage Fuse Links Catalogue

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丝印代码：AC16244；16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-
m P

丝印代码：AC16244；16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-
m P

丝印代码：AC16244；16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-
m P

丝印代码：AC16244；16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-
m P

丝印代码：AC16244；16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-
m P

丝印代码：AC16245；16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-
m P

丝印代码：AC16245；16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-
m P

丝印代码：AC16245；16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-
m P

丝印代码：AC16373；16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family 3-State True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 50

丝印代码：AC16373；16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family 3-State True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 50

丝印代码：AC16373；16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family 3-State True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 50

丝印代码：AC16374；16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family 3-State True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 50

丝印代码：AC16374；16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family 3-State True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 50

丝印代码：AC16374；16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family 3-State True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 50

丝印代码：AC16652；16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus E Family Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configurations Minimize High-Speed Switching Noise EPIC E (Enhanced-Perfo

丝印代码：AC16652；16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus E Family Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configurations Minimize High-Speed Switching Noise EPIC E (Enhanced-Perfo

丝印代码：AC161M；CDx4AC161 4-Bit Synchronous Binary Counters

1 Features • Internal look-ahead for fast counting • Carry output for n-bit cascading • Synchronous counting • Synchronously programmable • SCR-latchup-resistant CMOS process and circuit design • Exceeds 2kV ESD protection per MIL-STD-883, method 3015 2 Description The ’AC161 devices a

丝印代码：AC161M；CDx4AC161 4-Bit Synchronous Binary Counters

1 Features • Internal look-ahead for fast counting • Carry output for n-bit cascading • Synchronous counting • Synchronously programmable • SCR-latchup-resistant CMOS process and circuit design • Exceeds 2kV ESD protection per MIL-STD-883, method 3015 2 Description The ’AC161 devices a

丝印代码：AC161M；CDx4AC161 4-Bit Synchronous Binary Counters

1 Features • Internal look-ahead for fast counting • Carry output for n-bit cascading • Synchronous counting • Synchronously programmable • SCR-latchup-resistant CMOS process and circuit design • Exceeds 2kV ESD protection per MIL-STD-883, method 3015 2 Description The ’AC161 devices a

丝印代码：AC163M；4-BIT SYNCHRONOUS BINARY COUNTERS

Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable description/ordering information The ’AC163 devices are 4-bit binary counters. These synchronous, presettable counters feature an internal carry look-ahead for applicatio

丝印代码：AC163M；4-BIT SYNCHRONOUS BINARY COUNTERS

Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable description/ordering information The ’AC163 devices are 4-bit binary counters. These synchronous, presettable counters feature an internal carry look-ahead for applicatio

丝印代码：AC163M；4-BIT SYNCHRONOUS BINARY COUNTERS

Internal Look-Ahead for Fast Counting Carry Output for n-Bit Cascading Synchronous Counting Synchronously Programmable description/ordering information The ’AC163 devices are 4-bit binary counters. These synchronous, presettable counters feature an internal carry look-ahead for applicatio

丝印代码：AC164Q；SN74AC164-Q1 Automotive 8-Bit Serial-In/Parallel-Out Shift Register

1 Features • AEC-Q100 qualified for automotive applications: – Device temperature grade 1: -40°C to +125°C – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B • Available in wettable flank QFN package • Wide operating range of 1.5V to 6V • Inputs accept voltage

丝印代码：AC164Q；SN74AC164-Q1 Automotive 8-Bit Serial-In/Parallel-Out Shift Register

1 Features • AEC-Q100 qualified for automotive applications: – Device temperature grade 1: -40°C to +125°C – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B • Available in wettable flank QFN package • Wide operating range of 1.5V to 6V • Inputs accept voltage

丝印代码：AC165；SN74AC165 8-Bit Parallel Input Shift Register

1 Features • Wide operating range of 1.5V to 6V • Inputs accept voltages up to 6V • Continuous ±24mA output drive at 5V • Supports up to ±75mA output drive at 5V in short bursts • Drives 50Ω transmission lines • Maximum tpd of 10.1ns at 5V, 50pF load 2 Applications • Increase the number

丝印代码：AC165；SN74AC165 8-Bit Parallel Input Shift Register

1 Features • Wide operating range of 1.5V to 6V • Inputs accept voltages up to 6V • Continuous ±24mA output drive at 5V • Supports up to ±75mA output drive at 5V in short bursts • Drives 50Ω transmission lines • Maximum tpd of 10.1ns at 5V, 50pF load 2 Applications • Increase the number

丝印代码：AC165；SN74AC165 8-Bit Parallel Input Shift Register

1 Features • Wide operating range of 1.5V to 6V • Inputs accept voltages up to 6V • Continuous ±24mA output drive at 5V • Supports up to ±75mA output drive at 5V in short bursts • Drives 50Ω transmission lines • Maximum tpd of 10.1ns at 5V, 50pF load 2 Applications • Increase the number

丝印代码：AC165；SN74AC165 8-Bit Parallel Input Shift Register

1 Features • Wide operating range of 1.5V to 6V • Inputs accept voltages up to 6V • Continuous ±24mA output drive at 5V • Supports up to ±75mA output drive at 5V in short bursts • Drives 50Ω transmission lines • Maximum tpd of 10.1ns at 5V, 50pF load 2 Applications • Increase the number

丝印代码：AC165Q；SN74AC165-Q1 Automotive 8-Bit Parallel Input Shift Register

1 Features • AEC-Q100 qualified for automotive applications: – Device temperature grade 1: -40°C to +125°C – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B • Available in wettable flank QFN package • Wide operating range of 1.5V to 6V • Inputs accept voltage

丝印代码：AC165Q；SN74AC165-Q1 Automotive 8-Bit Parallel Input Shift Register

1 Features • AEC-Q100 qualified for automotive applications: – Device temperature grade 1: -40°C to +125°C – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B • Available in wettable flank QFN package • Wide operating range of 1.5V to 6V • Inputs accept voltage

丝印代码：AC165Q；SN74AC165-Q1 Automotive 8-Bit Parallel Input Shift Register

1 Features • AEC-Q100 qualified for automotive applications: – Device temperature grade 1: -40°C to +125°C – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B • Available in wettable flank QFN package • Wide operating range of 1.5V to 6V • Inputs accept voltage

丝印代码：AC165Q；SN74AC165-Q1 Automotive 8-Bit Parallel Input Shift Register

1 Features • AEC-Q100 qualified for automotive applications: – Device temperature grade 1: -40°C to +125°C – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B • Available in wettable flank QFN package • Wide operating range of 1.5V to 6V • Inputs accept voltage

丝印代码：AC16Q；SN74AC16-Q1 Automotive Hex Inverters With Schmitt-Trigger Inputs and Open-Drain Outputs

1 Features • AEC-Q100 qualified for automotive applications: – Device temperature grade 1: -40°C to +125°C – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B • Wide operating range of 1.5V to 6V • Continuous 24mA output drive at 5V • Supports up to 75mA output

丝印代码：AC16Q；SN74AC16-Q1 Automotive Hex Inverters With Schmitt-Trigger Inputs and Open-Drain Outputs

1 Features • AEC-Q100 qualified for automotive applications: – Device temperature grade 1: -40°C to +125°C – Device HBM ESD classification level 2 – Device CDM ESD classification level C4B • Wide operating range of 1.5V to 6V • Continuous 24mA output drive at 5V • Supports up to 75mA output

GERMANIUM SMALL SIGNAL TRANSISTORS

[Germanium Power Devices Corporation] GERMANIUM SMALL SIGNAL TRANSISTORS PRO ELECTRON TYPES

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

Header Specification

INTRODUCTION This document contains information about MPLAB® ICD 2 headers, which provide in-circuit debugging capabilities for specific Microchip devices. A special ICD/ICE device is connected to a header board to be used with MPLAB ICD 2. This device is mounted on the top of a header and its s

2.5V/3.3V 16-bit buffer/line driver 3-State

DESCRIPTION The 74ALVC16244(74ALVCH16244) is a 16-bit non-inverting buffer/line driver with 3-State outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the o

2.5V/3.3V 16-bit buffer/line driver 3-State

DESCRIPTION The 74ALVC16244(74ALVCH16244) is a 16-bit non-inverting buffer/line driver with 3-State outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the o

2.5V/3.3V 16-bit bus transceiver with direction pin 3-State

DESCRIPTION The 74ALVC16245(74ALVCH16245) is a 16-bit transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. The 74ALVC16245(74ALVCH16245) features two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for direct

2.5V/3.3V 16-bit bus transceiver with direction pin 3-State

DESCRIPTION The 74ALVC16245(74ALVCH16245) is a 16-bit transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. The 74ALVC16245(74ALVCH16245) features two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for direct

2.5V/3.3V 16-bit bus transceiver with direction pin 3-State

DESCRIPTION The 74ALVC16245(74ALVCH16245) is a 16-bit transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. The 74ALVC16245(74ALVCH16245) features two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for direct

18-bit registered driver with inverted register enable and 30ohm termination resistors 3-State

DESCRIPTION The 74ALVC162834A is an 18-bit registered driver. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Current drive ± 12 mA at 3.0 V • MULTIBYTETM flow-through sta

16 Chars x 2 Line 1/16 Duty

16 Chars x 2 Line 1/16 Duty

GERMANIUM SMALL SIGNAL TRANSISTORS

[Germanium Power Devices Corporation] GERMANIUM SMALL SIGNAL TRANSISTORS PRO ELECTRON TYPES