16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family 3-State True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 50

16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family 3-State True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 50

IMPROVED LATCH-UP IMMUNITY

DESCRIPTION The 74AC16373 CMOS 16 BIT D-TYPE LATCH with 3 STATE OUTPUTS NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and tr

16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件：187.94 Kbytes Page：9 Pages

16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件：321.34 Kbytes Page：11 Pages

16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

文件：187.94 Kbytes Page：9 Pages