丝印代码：ABT652A；OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc

丝印代码：ABT652A；OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc

丝印代码：ABT652A；OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc

丝印代码：ABT652A；OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc

丝印代码：ABT652A；OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc

PNP SILICON POWER DARLINGTONS

PNP SILICON POWER DARLINGTONS ● Designed for Complementary Use with BD645, BD647, BD649 and BD651 ● 62.5 W at 25°C Case Temperature ● 8 A Continuous Collector Current ● Minimum hFE of 750 at 3 V , 3 A

Octal bus transceiver/register; 3-state

DESCRIPTION The 74HC/HCT652 are high-speed SI-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with Jedec standard no. 7A. FEATURES • Multiplexed real-time and stored data • Independent register for A and B buses • Independent enab

RF POWER TRANSISTORS NPN SILICON

The RF Line NPN SILICON RF POWER TRANSISTORS Designedfor 12.5 Vdc UHFlarge–signal, amplifier applications in industrial and commercial FM equipment operating to 512 MHz. • Guaranteed 12.5 Volt, 512 MHz Characteristics Output Power = 5.0 Watts Minimum Gain = 10 dB Efficiency = 65 (

RF POWER TRANSISTORS NPN SILICON

The RF Line NPN SILICON RF POWER TRANSISTORS Designedfor 12.5 Vdc UHFlarge–signal, amplifier applications in industrial and commercial FM equipment operating to 512 MHz. • Guaranteed 12.5 Volt, 512 MHz Characteristics Output Power = 5.0 Watts Minimum Gain = 10 dB Efficiency = 65 (

DIFFERENTIAL VARIABLE GAIN AMPLIFIER

DESCRIPTION The TS652 is a differential digitally controled variable gain amplifier featuring a high slew rate of 90V/µs, a large bandwidth, a very low distortion and a very low current and voltage noise. ■ LOW NOISE : 4.6nV/√Hz ■ LOW DISTORTION ■ HIGH SLEW RATE : 90V/µs ■ WIDE BANDWIDTH : 52