丝印代码：932SQ420DGLF；PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on CPU/SRC/PCI outputs/Lower EMI • 64-pin TSSOP and MLF packages/Space Savings Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

丝印代码：932SQ420DGLF；PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on CPU/SRC/PCI outputs/Lower EMI • 64-pin TSSOP and MLF packages/Space Savings Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

Frequency Timing Generator for Dual Server/Workstation Systems

Features • Generates the following system clocks: - 6 CPU clocks ( 2.5V, 100/133MHz) - 6 PCI clocks, including 1 free running(3.3V, 33MHz) - 3 IOAPIC clocks (2.5V, 16.67MHz) - 2 Fixed frequency 66MHz clocks(3.3V, 66MHz) - 2 REF clocks(3.3V, 14.318MHz) - 1 USB clock (3.3V, 48MHz) • Efficie

Frequency Timing Generator for Dual Server/Workstation Systems

Features • Generates the following system clocks: - 6 CPU clocks ( 2.5V, 100/133MHz) - 6 PCI clocks, including 1 free running(3.3V, 33MHz) - 3 IOAPIC clocks (2.5V, 16.67MHz) - 2 Fixed frequency 66MHz clocks(3.3V, 66MHz) - 2 REF clocks(3.3V, 14.318MHz) - 1 USB clock (3.3V, 48MHz) • Efficie

Frequency Generator with 133MHz Differential CPU Clocks

Output Features: • 4 Differential CPU Clock Pairs @ 3.3V • 7 PCI (3.3V) @ 33.3MHz • 3 PCI_F (3.3V) @ 33.3MHz • 1 USB (3.3V) @ 48MHz • 1 DOT (3.3V) @ 48MHz • 1 REF (3.3V) @ 14.318MHz • 1 3V66 (3.3V) @ 66.6MHz • 1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz • 3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN or

Frequency Generator with 133MHz Differential CPU Clocks

Output Features: • 4 Differential CPU Clock Pairs @ 3.3V • 7 PCI (3.3V) @ 33.3MHz • 3 PCI_F (3.3V) @ 33.3MHz • 1 USB (3.3V) @ 48MHz • 1 DOT (3.3V) @ 48MHz • 1 REF (3.3V) @ 14.318MHz • 1 3V66 (3.3V) @ 66.6MHz • 1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz • 3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN or

Frequency Generator with 133MHz Differential CPU Clocks

Output Features: • 4 Differential CPU Clock Pairs @ 3.3V • 7 PCI (3.3V) @ 33.3MHz • 3 PCI_F (3.3V) @ 33.3MHz • 1 USB (3.3V) @ 48MHz • 1 DOT (3.3V) @ 48MHz • 1 REF (3.3V) @ 14.318MHz • 1 3V66 (3.3V) @ 66.6MHz • 1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz • 3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN or

Frequency Generator with 133MHz Differential CPU Clocks

Output Features: • 4 Differential CPU Clock Pairs @ 3.3V • 7 PCI (3.3V) @ 33.3MHz • 3 PCI_F (3.3V) @ 33.3MHz • 1 USB (3.3V) @ 48MHz • 1 DOT (3.3V) @ 48MHz • 1 REF (3.3V) @ 14.318MHz • 1 3V66 (3.3V) @ 66.6MHz • 1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz • 3 66MHz_OUT/3V66 (3.3V) @ 66.6MHz_IN or

Programmable Timing Control HubTM for Next Gen P4TM Processor

Features/Benefits: • Supports tight ppm accuracy clocks for Serial-ATA • Supports spread spectrum modulation, 0 to -0.5 down spread and +/- 0.25 center spread • Supports CPU clks up to 400MHz in test mode • Uses external 14.318MHz crystal Output Features: • 4 - 0.7V current-mode differentia

Programmable Timing Control HubTM for Next Gen P4TM Processor

Features/Benefits: • Supports tight ppm accuracy clocks for Serial-ATA • Supports spread spectrum modulation, 0 to -0.5 down spread and +/- 0.25 center spread • Supports CPU clks up to 400MHz in test mode • Uses external 14.318MHz crystal Output Features: • 4 - 0.7V current-mode differentia

Programmable Timing Control HubTM for Next Gen P4TM Processor

Features/Benefits: • Supports tight ppm accuracy clocks for Serial-ATA • Supports spread spectrum modulation, 0 to -0.5 down spread and +/- 0.25 center spread • Supports CPU clks up to 400MHz in test mode • Uses external 14.318MHz crystal Output Features: • 4 - 0.7V current-mode differentia

Programmable Timing Control HubTM for Next Gen P4TM Processor

Features/Benefits: • Supports tight ppm accuracy clocks for Serial-ATA • Supports spread spectrum modulation, 0 to -0.5 down spread and +/- 0.25 center spread • Supports CPU clks up to 400MHz in test mode • Uses external 14.318MHz crystal Output Features: • 4 - 0.7V current-mode differentia

Programmable Timing Control HubTM for Next Gen P4TM Processor

Features/Benefits: • Supports tight ppm accuracy clocks for Serial-ATA • Supports spread spectrum modulation, 0 to -0.5 down spread and +/- 0.25 center spread • Supports CPU clks up to 400MHz in test mode • Uses external 14.318MHz crystal Output Features: • 4 - 0.7V current-mode differentia

Programmable Timing Control HubTM for Next Gen P4TM Processor

Features/Benefits: • Supports tight ppm accuracy clocks for Serial-ATA • Supports spread spectrum modulation, 0 to -0.5 down spread and +/- 0.25 center spread • Supports CPU clks up to 400MHz in test mode • Uses external 14.318MHz crystal Output Features: • 4 - 0.7V current-mode differentia

Programmable Timing Control HubTM for Next Gen P4TM Processor

General Description ICS932S208 follows Intel CK409B Yellow Cover specification. This clock synthesizer provides a single chip solution for next generation P4 Intel processors and Intel chipsets. ICS932S208 is driven with a 14.318MHz crystal. It generates CPU outputs up to 200MHz. It also provides

Programmable Timing Control HubTM for Next Gen P4TM Processor

General Description ICS932S208 follows Intel CK409B Yellow Cover specification. This clock synthesizer provides a single chip solution for next generation P4 Intel processors and Intel chipsets. ICS932S208 is driven with a 14.318MHz crystal. It generates CPU outputs up to 200MHz. It also provides

Programmable Timing Control Hub for Intel-based Servers

Recommended Application: CK410B clock for Intel-based servers Output Features: • 4 - 0.7V current-mode differential CPU pairs • 5 - 0.7V current-mode differential SRC pair • 4 - PCI (33MHz) • 3 - PCICLK_F, (33MHz) free-running • 1 - 48MHz • 2 - REF, 14.318MHz Key Specifications: • CPU cy

Programmable Timing Control Hub for Intel-based Servers

Recommended Application: CK410B clock for Intel-based servers Output Features: • 4 - 0.7V current-mode differential CPU pairs • 5 - 0.7V current-mode differential SRC pair • 4 - PCI (33MHz) • 3 - PCICLK_F, (33MHz) free-running • 1 - 48MHz • 2 - REF, 14.318MHz Key Specifications: • CPU cy

Programmable Timing Control Hub for Intel-based Servers

Recommended Application: CK410B clock for Intel-based servers Output Features: • 4 - 0.7V current-mode differential CPU pairs • 5 - 0.7V current-mode differential SRC pair • 4 - PCI (33MHz) • 3 - PCICLK_F, (33MHz) free-running • 1 - 48MHz • 2 - REF, 14.318MHz Key Specifications: • CPU cy

Programmable Timing Control Hub for Intel-based Servers

Recommended Application: CK410B clock for Intel-based servers Output Features: • 4 - 0.7V current-mode differential CPU pairs • 5 - 0.7V current-mode differential SRC pair • 4 - PCI (33MHz) • 3 - PCICLK_F, (33MHz) free-running • 1 - 48MHz • 2 - REF, 14.318MHz Key Specifications: • CPU cy

PCIe Gen2 and QPI Clock for Intel-Based Servers

Key Specifications: • PCIe Gen 2 compliant SRC outputs • QPI & FBD 2 compliant CPU clocks • CPU cycle-cycle jitter:

PCIe Gen2 and QPI Clock for Intel-Based Servers

Key Specifications: • PCIe Gen 2 compliant SRC outputs • QPI & FBD 2 compliant CPU clocks • CPU cycle-cycle jitter:

PCIe Gen2 and QPI Clock for Intel-Based Servers

Key Specifications: • PCIe Gen 2 compliant SRC outputs • QPI & FBD 2 compliant CPU clocks • CPU cycle-cycle jitter:

PCIe Gen2 and QPI Clock for Intel-Based Servers

Key Specifications: • PCIe Gen 2 compliant SRC outputs • QPI & FBD 2 compliant CPU clocks • CPU cycle-cycle jitter:

PCIe Gen 2 and QPI Clock for Intel-based Servers

Output Features: • 4 - 0.7V current-mode differential CPU pairs • 5 - 0.7V current-mode differential SRC pair • 4 - PCI (33MHz) • 3 - PCICLK_F, (33MHz) free-running • 1 - 48MHz • 2 - REF, 14.318MHz Features/Benefits: • Supports spread spectrum modulation, 0 to -0.5 down spread on CPU outp

PCIe Gen 2 and QPI Clock for Intel-based Servers

Output Features: • 4 - 0.7V current-mode differential CPU pairs • 5 - 0.7V current-mode differential SRC pair • 4 - PCI (33MHz) • 3 - PCICLK_F, (33MHz) free-running • 1 - 48MHz • 2 - REF, 14.318MHz Features/Benefits: • Supports spread spectrum modulation, 0 to -0.5 down spread on CPU outp

K8 Clock Chip for Serverworks HT2100 Servers

Output Features: • 7 - Pairs of AMD K8 clocks • 6 - Pair of SRC/PCI Express* clock • 3 - 14.318 MHz REF clocks • 3 - 48MHz clocks • 2 - PCI 33 MHz clocks • 2 - 25MHz clocks • Spread Spectrum for EMI reduction • Outputs may be disabled via SMBus • M/N programming via SMBus Features:

K8 Clock Chip for Serverworks HT2100 Servers

Output Features: • 7 - Pairs of AMD K8 clocks • 6 - Pair of SRC/PCI Express* clock • 3 - 14.318 MHz REF clocks • 3 - 48MHz clocks • 2 - PCI 33 MHz clocks • 2 - 25MHz clocks • Spread Spectrum for EMI reduction • Outputs may be disabled via SMBus • M/N programming via SMBus Features:

Clock Chip for 2 and 4-way AMD K8-based servers

Recommended Application: Serverworks HT2100-based systems using AMD K8 processors Output Features: • 6 - Pairs of AMD K8 clocks • 5 - Pairs of SRC/PCI Express* clock • 3 - 14.318MHz REF clocks • 3 - 48MHz clocks • 1 - PCI 33MHz clocks • 1 - HTT 66MHz clock • 4 - 25MHz clocks Features:

Low Power Clock Chip for Serverworks HT2400 Servers

Output Features: • 7 - Pairs of AMD Low Power K8 Greyhound compliant clocks • 7 - Pair of SRC/PCI Express* Gen 2 clocks • 3 - 14.318 MHz REF clocks including 1 free-running • 2 - 48MHz clocks • 2 - PCI 33 MHz clocks • 2 - 25MHz clocks Features: • Spread Spectrum for EMI reduction • Outpu

RD890 SYSTEM CLOCK FOR AMD-BASED SERVERS 932S890C

Features/Benefits • Spread Spectrum; EMI reduction • Outputs may be disabled via SMBus; saves power • External crystal load capacitors; maximum frequency accuracy Key Specifications • CPU output cycle-to-cycle jitter

RD890 SYSTEM CLOCK FOR AMD-BASED SERVERS 932S890C

Features/Benefits • Spread Spectrum; EMI reduction • Outputs may be disabled via SMBus; saves power • External crystal load capacitors; maximum frequency accuracy Key Specifications • CPU output cycle-to-cycle jitter

RD890 SYSTEM CLOCK FOR AMD-BASED SERVERS 932S890C

Features/Benefits • Spread Spectrum; EMI reduction • Outputs may be disabled via SMBus; saves power • External crystal load capacitors; maximum frequency accuracy Key Specifications • CPU output cycle-to-cycle jitter

PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on CPU/SRC/PCI outputs/Lower EMI • 64-pin TSSOP and MLF packages/Space Savings Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

丝印代码：ICS932SQ420DKL；PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on CPU/SRC/PCI outputs/Lower EMI • 64-pin TSSOP and MLF packages/Space Savings Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

丝印代码：ICS932SQ420DKL；PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on CPU/SRC/PCI outputs/Lower EMI • 64-pin TSSOP and MLF packages/Space Savings Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

PCIE GEN2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on CPU/SRC/PCI outputs; Lower EMI • 56-pin MLF package; 21 space savings compared to 932SQ420 64-pin MLF Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

丝印代码：ICS932SQ425AL；PCIE GEN2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on CPU/SRC/PCI outputs; Lower EMI • 56-pin MLF package; 21 space savings compared to 932SQ420 64-pin MLF Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

丝印代码：ICS932SQ425AL；PCIE GEN2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on CPU/SRC/PCI outputs; Lower EMI • 56-pin MLF package; 21 space savings compared to 932SQ420 64-pin MLF Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

Features/Benefits • Non-spread 100MHz outputs/ Supports SRnS PCIe architectures • 64-pin TSSOP and VFQFPN packages; maximum space savings Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

丝印代码：ICS932SQ426AKL；CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

Features/Benefits • Non-spread 100MHz outputs/ Supports SRnS PCIe architectures • 64-pin TSSOP and VFQFPN packages; maximum space savings Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

丝印代码：ICS932SQ426AKL；CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

Features/Benefits • Non-spread 100MHz outputs/ Supports SRnS PCIe architectures • 64-pin TSSOP and VFQFPN packages; maximum space savings Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

丝印代码：ICS932SQ426AKL；CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

Features/Benefits • Non-spread 100MHz outputs/ Supports SRnS PCIe architectures • 64-pin TSSOP and VFQFPN packages; maximum space savings Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

丝印代码：ICS932SQ426AKL；CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

Features/Benefits • Non-spread 100MHz outputs/ Supports SRnS PCIe architectures • 64-pin TSSOP and VFQFPN packages; maximum space savings Key Specifications • Cycle to cycle jitter: CPU/SRC/NS_SRC/NS_SAS

PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on SRC/PCI outputs; Lower EMI • 48-pin MLF package; Space Savings Key Specifications • Cycle to cycle jitter: SRC/NS_SAS

丝印代码：ICS32SQ428AL；PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on SRC/PCI outputs; Lower EMI • 48-pin MLF package; Space Savings Key Specifications • Cycle to cycle jitter: SRC/NS_SAS

丝印代码：ICS32SQ428AL；PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS

Features/Benefits • 0.5 down spread capable on SRC/PCI outputs; Lower EMI • 48-pin MLF package; Space Savings Key Specifications • Cycle to cycle jitter: SRC/NS_SAS

Low-Power CK420BQ Derivative for PCIe Common Clock Architectures

Features/Benefits • Integrated 85 ohm differential terminations; saves 48 resistors and 82mm2 area • LP-HCSL output drivers; 40 typical power savings over 932SQ420 • 0.5 down spread capable on CPU, SRC and PCI outputs; reduce EMI • Additional down spread amounts selectable via SMBus; maxim

Low-Power CK420BQ Derivative for PCIe Common Clock Architectures

Features/Benefits • Integrated 85 ohm differential terminations; saves 48 resistors and 82mm2 area • LP-HCSL output drivers; 40 typical power savings over 932SQ420 • 0.5 down spread capable on CPU, SRC and PCI outputs; reduce EMI • Additional down spread amounts selectable via SMBus; maxim

Low-Power CK420BQ Derivative for PCIe Common Clock Architectures

Features/Benefits • Integrated 85 ohm differential terminations; saves 48 resistors and 82mm2 area • LP-HCSL output drivers; 40 typical power savings over 932SQ420 • 0.5 down spread capable on CPU, SRC and PCI outputs; reduce EMI • Additional down spread amounts selectable via SMBus; maxim

Low-Power CK420BQ Derivative for PCIe Common Clock Architectures

Features/Benefits • Integrated 85 ohm differential terminations; saves 48 resistors and 82mm2 area • LP-HCSL output drivers; 40 typical power savings over 932SQ420 • 0.5 down spread capable on CPU, SRC and PCI outputs; reduce EMI • Additional down spread amounts selectable via SMBus; maxim

Low-Power CK420BQ Derivative for PCIe Common Clock Architectures

Features/Benefits • Integrated 85 ohm differential terminations; saves 48 resistors and 82mm2 area • LP-HCSL output drivers; 40 typical power savings over 932SQ420 • 0.5 down spread capable on CPU, SRC and PCI outputs; reduce EMI • Additional down spread amounts selectable via SMBus; maxim

Low-Power CK420BQ Derivative for PCIe Separate Clock Architectures

Features/Benefits • Integrated 85-ohm differential terminations; saves 48 resistors compared to CK420BQ • LP-HCSL outputs; up to 50 power savings compared to standard CK420BQ • 64-pin TSSOP and VFQFPN packages; smallest board footprint • Available in -40° to +85°C industrial temperature ran

Low-Power CK420BQ Derivative for PCIe Separate Clock Architectures

Features/Benefits • Integrated 85-ohm differential terminations; saves 48 resistors compared to CK420BQ • LP-HCSL outputs; up to 50 power savings compared to standard CK420BQ • 64-pin TSSOP and VFQFPN packages; smallest board footprint • Available in -40° to +85°C industrial temperature ran

Low-Power CK420BQ Derivative for PCIe Separate Clock Architectures

Features/Benefits • Integrated 85-ohm differential terminations; saves 48 resistors compared to CK420BQ • LP-HCSL outputs; up to 50 power savings compared to standard CK420BQ • 64-pin TSSOP and VFQFPN packages; smallest board footprint • Available in -40° to +85°C industrial temperature ran

Low-Power CK420BQ Derivative for PCIe Separate Clock Architectures

Features/Benefits • Integrated 85-ohm differential terminations; saves 48 resistors compared to CK420BQ • LP-HCSL outputs; up to 50 power savings compared to standard CK420BQ • 64-pin TSSOP and VFQFPN packages; smallest board footprint • Available in -40° to +85°C industrial temperature ran

Low-Power CK420BQ Derivative for PCIe Separate Clock Architectures

Features/Benefits • Integrated 85-ohm differential terminations; saves 48 resistors compared to CK420BQ • LP-HCSL outputs; up to 50 power savings compared to standard CK420BQ • 64-pin TSSOP and VFQFPN packages; smallest board footprint • Available in -40° to +85°C industrial temperature ran

Low-Power CK420BQ Derivative for PCIe Separate Clock Architectures

Features/Benefits • Integrated 85-ohm differential terminations; saves 48 resistors compared to CK420BQ • LP-HCSL outputs; up to 50 power savings compared to standard CK420BQ • 64-pin TSSOP and VFQFPN packages; smallest board footprint • Available in -40° to +85°C industrial temperature ran

Low-Power CK420BQ Derivative for PCIe Separate Clock Architectures

Features/Benefits • Integrated 85-ohm differential terminations; saves 48 resistors compared to CK420BQ • LP-HCSL outputs; up to 50 power savings compared to standard CK420BQ • 64-pin TSSOP and VFQFPN packages; smallest board footprint • Available in -40° to +85°C industrial temperature ran

Low-Power CK420BQ Derivative for PCIe Separate Clock Architectures

Features/Benefits • Integrated 85-ohm differential terminations; saves 48 resistors compared to CK420BQ • LP-HCSL outputs; up to 50 power savings compared to standard CK420BQ • 64-pin TSSOP and VFQFPN packages; smallest board footprint • Available in -40° to +85°C industrial temperature ran