丝印代码：8P34S1106NLGI；1:6 LVDS Output 1.8V Fanout Buffer

Features • Six low skew, low additive jitter LVDS output pairs • One differential clock input pair • Differential CLK, nCLK pair can accept the following differential input levels: LVDS, CML • Maximum input clock frequency: 1.2GHz (maximum) • Output skew: 20ps (typical) • Propagation delay:

丝印代码：8P34S1106NLGI；1:6 LVDS Output 1.8V Fanout Buffer

Features • Six low skew, low additive jitter LVDS output pairs • One differential clock input pair • Differential CLK, nCLK pair can accept the following differential input levels: LVDS, CML • Maximum input clock frequency: 1.2GHz (maximum) • Output skew: 20ps (typical) • Propagation delay:

封装/外壳：20-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CLK BUFFER 1:6 1.2GHZ 20VQFN 集成电路（IC） 时钟缓冲器，驱动器

时钟驱动器及分配 1:6 LVDS Output 1.8V Fanout Buffer

时钟驱动器及分配 1 to 6 LVDS Output 1.8V Fanout Buffer

封装/外壳：20-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：VFQFPN 4.00X4.00X1.00 MM, 0.50MM 集成电路（IC） 时钟缓冲器，驱动器

1:6 LVDS Output 1.8V Fanout Buffer

Features • Six low skew, low additive jitter LVDS output pairs • One differential clock input pair • Differential CLK, nCLK pair can accept the following differential input levels: LVDS, CML • Maximum input clock frequency: 1.2GHz (maximum) • Output skew: 20ps (typical) • Propagation delay:

One differential clock input pair

文件：312.25 Kbytes Page：18 Pages