85408BGLF价格

参考价格:¥41.3305

型号:85408BGLF 品牌:IDT 备注:这里有85408BGLF多少钱,2025年最近7天走势,今日出价,今日竞价,85408BGLF批发/采购报价,85408BGLF行情走势销售排行榜,85408BGLF报价。
型号 功能描述 生产厂家 企业 LOGO 操作
85408BGLF

Low Skew, 1-to-8, Differential-to-LVDS Clock

Features • Eight differential LVDS output pairs • CLK/nCLK can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Translates any differential input signal (LVPECL, LVHSTL, SSTL, HCSL) to LVDS levels without external bias netw

RENESAS

瑞萨

85408BGLF

封装/外壳:24-TSSOP(0.173",4.40mm 宽) 包装:管件 描述:IC CLK BUFFER 1:8 700MHZ 24TSSOP 集成电路(IC) 时钟缓冲器,驱动器

ETC

知名厂家

85408BGLF

Low Skew, 1-to-8, Differential-to-LVDS Clock

文件:299.34 Kbytes Page:16 Pages

IDT

Low Skew, 1-to-8, Differential-to-LVDS Clock

Features • Eight differential LVDS output pairs • CLK/nCLK can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Translates any differential input signal (LVPECL, LVHSTL, SSTL, HCSL) to LVDS levels without external bias netw

RENESAS

瑞萨

Low Skew, 1-to-8, Differential-to-LVDS Clock

Features • Eight differential LVDS output pairs • CLK/nCLK can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Translates any differential input signal (LVPECL, LVHSTL, SSTL, HCSL) to LVDS levels without external bias netw

RENESAS

瑞萨

封装/外壳:24-TSSOP(0.173",4.40mm 宽) 包装:卷带(TR) 描述:IC CLK BUFFER 1:8 700MHZ 24TSSOP 集成电路(IC) 时钟缓冲器,驱动器

ETC

知名厂家

Low Skew, 1-to-8, Differential-to-LVDS Clock

文件:299.34 Kbytes Page:16 Pages

IDT

Low Skew, 1-to-8, Differential-to-LVDS Clock

Features • Eight differential LVDS output pairs • One differential clock input pair • CLK, nCLK can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Translates any differential input signal (LVPECL, LVHSTL, SSTL, HCSL) to

RENESAS

瑞萨

Low Skew, 1-to-8, Differential-to-LVDS Clock

Features • Eight differential LVDS output pairs • One differential clock input pair • CLK, nCLK can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Translates any differential input signal (LVPECL, LVHSTL, SSTL, HCSL) to

RENESAS

瑞萨

Low Skew, 1-to-8 , Different ial-to-LVDS Clock

文件:299.2 Kbytes Page:16 Pages

IDT

Low Skew, 1-to-8 , Different ial-to-LVDS Clock

文件:299.2 Kbytes Page:16 Pages

IDT

更新时间:2025-9-26 22:50:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
ICSI
23+
SSOP24
20000
全新原装假一赔十
IDT
25+
TSSOP-24
32360
IDT全新特价85408BGLF即刻询购立享优惠#长期有货
ICSI
07+
SSOP24
2145
全新原装进口自己库存优势
PRECI-DIP
2022+
NA
10000
只做原装,价格优惠,长期供货。
Triquint
24+
SMD
1680
Triquint专营品牌进口原装现货假一赔十
PRECI-DIP
2450+
SOP
6540
只做原厂原装正品终端客户免费申请样品
HIT
24+
SOP
3000
MOLEX/莫仕
2508+
/
209858
一级代理,原装现货
Abbatron/HHSmith
5
全新原装 货期两周
Renesas Electronics America In
25+
24-TSSOP(0.173 4.40mm 宽)
9350
独立分销商 公司只做原装 诚心经营 免费试样正品保证

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