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853S价格
参考价格:¥77.8220
型号:853S006AGILF 品牌:IDT 备注:这里有853S多少钱,2025年最近7天走势,今日出价,今日竞价,853S批发/采购报价,853S行情走势销售排行榜,853S报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
3M??Polyester Tape 853 文件:128.949 Kbytes Page:5 Pages | 3M | |||
PC Mount, Shocksafe 5x20mm Fuses 文件:80.27 Kbytes Page:1 Pages | Littelfuse 力特 | |||
2:1 Differential-to-LVPECL Multiplexer Features • One LVPECL output pair • Two selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx • Part- | RENESAS 瑞萨 | |||
Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer Features • Two differential 2.5V, 3.3V LVPECL/ECL outputs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: >2.5GHz • Translates any single-ended input signal to 3.3V LVPECL le | RENESAS 瑞萨 | |||
Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer Features • Two differential 2.5V, 3.3V LVPECL/ECL outputs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: >2.5GHz • Translates any single-ended input signal to 3.3V LVPECL le | RENESAS 瑞萨 | |||
Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer Features • Two differential 2.5V, 3.3V LVPECL/ECL outputs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: >2.5GHz • Translates any single-ended input signal to 3.3V LVPECL le | RENESAS 瑞萨 | |||
Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer Features • Two differential 2.5V, 3.3V LVPECL/ECL outputs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: >2.5GHz • Translates any single-ended input signal to 3.3V LVPECL le | RENESAS 瑞萨 | |||
Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer Features • Two differential 2.5V, 3.3V LVPECL/ECL outputs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: >2.5GHz • Translates any single-ended input signal to 3.3V LVPECL le | RENESAS 瑞萨 | |||
12:1, Differential-to-3.3V, 2.5V LVPECL Clock/Data Multiplexer Features • High speed 12:1 differential multiplexer • One differential 3.3V or 2.5V LVPECL output • Twelve selectable differential clock or data inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Maximum output frequency: 3.2GHz • Translates a | RENESAS 瑞萨 | |||
12:1, Differential-to-3.3V, 2.5V LVPECL Clock/Data Multiplexer Features • High speed 12:1 differential multiplexer • One differential 3.3V or 2.5V LVPECL output • Twelve selectable differential clock or data inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Maximum output frequency: 3.2GHz • Translates a | RENESAS 瑞萨 | |||
2:1 Differential-to-LVPECL Multiplexer Features • One LVPECL output pair • Two selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx • Part- | RENESAS 瑞萨 | |||
2:1 Differential-to-LVPECL Multiplexer Features • One LVPECL output pair • Two selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx • Part- | RENESAS 瑞萨 | |||
2:1 Differential-to-LVPECL Multiplexer Features • One LVPECL output pair • Two selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx • Part- | RENESAS 瑞萨 | |||
2:1 Differential-to-LVPECL Multiplexer Features • One LVPECL output pair • Two selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx • Part- | RENESAS 瑞萨 | |||
Low Skew, 1-to-9, Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer Features • Nine differential 2.5V, 3.3V LVPECL/ECL outputs • Selectable differential CLK, nCLK or LVPECL clock inputs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • PCLK, nPCLK supports the following input types: LVPECL, LVDS, CML, SST | RENESAS 瑞萨 | |||
Low Skew, 1-to-9, Differential-to-3.3V, 2.5V LVPECL/ECL Fanout Buffer Features • Nine differential 2.5V, 3.3V LVPECL/ECL outputs • Selectable differential CLK, nCLK or LVPECL clock inputs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • PCLK, nPCLK supports the following input types: LVPECL, LVDS, CML, SST | RENESAS 瑞萨 | |||
4:1, Differential-To-3.3V, 2.5V LVPECL/ECL Clock Data Multiplexer Features • High speed 4:1 differential multiplexer • One differential 3.3V, 2.5V LVPECL/ECL output • Four differential CLKx, nCLKx input pairs • Differential CLKx, nCLKx pairs can accept the following interface levels: LVPECL, LVDS, CML, SSTL • Maximum input/output frequency: 3GHz • Additiv | RENESAS 瑞萨 | |||
4:1, Differential-To-3.3V, 2.5V LVPECL/ECL Clock Data Multiplexer Features • High speed 4:1 differential multiplexer • One differential 3.3V, 2.5V LVPECL/ECL output • Four differential CLKx, nCLKx input pairs • Differential CLKx, nCLKx pairs can accept the following interface levels: LVPECL, LVDS, CML, SSTL • Maximum input/output frequency: 3GHz • Additiv | RENESAS 瑞萨 | |||
4:1, Differential-To-3.3V, 2.5V LVPECL/ECL Clock Data Multiplexer Features • High speed 4:1 differential multiplexer • One differential 3.3V, 2.5V LVPECL/ECL output • Four differential CLKx, nCLKx input pairs • Differential CLKx, nCLKx pairs can accept the following interface levels: LVPECL, LVDS, CML, SSTL • Maximum input/output frequency: 3GHz • Additiv | RENESAS 瑞萨 | |||
8:1 Differential-to-3.3V or 2.5V LVPECL/ECL Clock Multiplexer Features • High speed 8:1 differential muliplexer • One differential 3.3V or 2.5V LVPECL output pair • Eight selectable differential PCLKx, nPCLKx input pairs • Differential PCLKx, nPCLKx pairs can accept the following interface levels: LVPECL, LVDS, SSTL,CML • Maximum output frequency: 2.5G | RENESAS 瑞萨 | |||
8:1 Differential-to-3.3V or 2.5V LVPECL/ECL Clock Multiplexer Features • High speed 8:1 differential muliplexer • One differential 3.3V or 2.5V LVPECL output pair • Eight selectable differential PCLKx, nPCLKx input pairs • Differential PCLKx, nPCLKx pairs can accept the following interface levels: LVPECL, LVDS, SSTL,CML • Maximum output frequency: 2.5G | RENESAS 瑞萨 | |||
8:1 Differential-to-3.3V or 2.5V LVPECL/ECL Clock Multiplexer Features • High speed 8:1 differential muliplexer • One differential 3.3V or 2.5V LVPECL output pair • Eight selectable differential PCLKx, nPCLKx input pairs • Differential PCLKx, nPCLKx pairs can accept the following interface levels: LVPECL, LVDS, SSTL,CML • Maximum output frequency: 2.5G | RENESAS 瑞萨 | |||
Skew, 1-to-10, Differential-to-LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Skew, 1-to-10, Differential-to-LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Skew, 1-to-10, Differential-to-LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Skew, 1-to-10, Differential-to-LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Skew, 1-to-10, Differential-to-LVPECL/ECL Fanout Buffer Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Low Skew, 1-to-10, Differential-to-2.5V, 3.3V LVPECL/ECL Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Low Skew, 1-to-10, Differential-to-2.5V, 3.3V LVPECL/ECL Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Low Skew, 1-to-10, Differential-to-2.5V, 3.3V LVPECL/ECL Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Low Skew, 1-to-10, Differential-to-2.5V, 3.3V LVPECL/ECL Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Low Skew, 1-to-10, Differential-to-2.5V, 3.3V LVPECL/ECL Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Low Skew, 1-to-10, Differential-to-2.5V, 3.3V LVPECL/ECL Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
Low Skew, 1-to-10, Differential-to-2.5V, 3.3V LVPECL/ECL Features • Ten differential 2.5V, 3.3V LVPECL/ECL outputs • Two selectable differential input pairs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, SSTL, CML • Maximum output frequency: 2.5GHz • Translates any single-ended input signal to 3.3V LVPECL l | RENESAS 瑞萨 | |||
LOW SKEW, 1-TO-12, DIFFERENTIAL-TO- 3.3V, 2.5V LVPECL FANOUT BUFFER FEATURES • Twelve differential 3.3V, 2.5V LVPECL outputs • PCLK, nPCLK input pair • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL • Maximum output frequency: 1.5GHz • Translates any single-ended input signal to 2.5V or 3.3V LVPECL levels with a resis | RENESAS 瑞萨 | |||
LOW SKEW, 1-TO-12, DIFFERENTIAL-TO- 3.3V, 2.5V LVPECL FANOUT BUFFER FEATURES • Twelve differential 3.3V, 2.5V LVPECL outputs • PCLK, nPCLK input pair • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL • Maximum output frequency: 1.5GHz • Translates any single-ended input signal to 2.5V or 3.3V LVPECL levels with a resis | RENESAS 瑞萨 | |||
12:2, Differential-to-3.3V, 2.5V LVPECL Multiplexer Features • High speed 12.2 differential multiplexer • Two differential 3.3V or 2.5V LVPECL outputs • Twelve selectable differential clock or data inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS • Maximum output frequency: 3GHz • Translates any sin | RENESAS 瑞萨 | |||
12:2, Differential-to-3.3V, 2.5V LVPECL Multiplexer Features • High speed 12.2 differential multiplexer • Two differential 3.3V or 2.5V LVPECL outputs • Twelve selectable differential clock or data inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS • Maximum output frequency: 3GHz • Translates any sin | RENESAS 瑞萨 | |||
12:2, Differential-to-3.3V, 2.5V LVPECL Multiplexer Features • High speed 12.2 differential multiplexer • Two differential 3.3V or 2.5V LVPECL outputs • Twelve selectable differential clock or data inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS • Maximum output frequency: 3GHz • Translates any sin | RENESAS 瑞萨 | |||
Dual 2:1, 1:2 Differential-to-LVPECL/ ECL Multiplexer Features • Dual 2:1, 1:2 MUX • Three LVPECL output pairs • Three differential clock inputs can accept: LVPECL, LVDS, CML • Loopback test mode available • Maximum output frequency: 2.5GHz • Propagation delay: 550ps (maximum) • Part-to-part skew: 275ps (maximum) • Additive phase jitter, RMS: | RENESAS 瑞萨 | |||
Dual 2:1, 1:2 Differential-to-LVPECL/ ECL Multiplexer Features • Dual 2:1, 1:2 MUX • Three LVPECL output pairs • Three differential clock inputs can accept: LVPECL, LVDS, CML • Loopback test mode available • Maximum output frequency: 2.5GHz • Propagation delay: 550ps (maximum) • Part-to-part skew: 275ps (maximum) • Additive phase jitter, RMS: | RENESAS 瑞萨 | |||
Dual 2:1, 1:2 Differential-to-LVPECL/ECL Multiplexer Features • Three differential LVPECL output pairs • Three differential LVPECL clock inputs • PCLKx/nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Maximum output frequency: 2.5GHz • Part-to-part skew: 200ps (maximum) • Propagation delay: QA, nQA: 450ps ( | RENESAS 瑞萨 | |||
Dual 2:1, 1:2 Differential-to-LVPECL/ECL Multiplexer Features • Three differential LVPECL output pairs • Three differential LVPECL clock inputs • PCLKx/nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Maximum output frequency: 2.5GHz • Part-to-part skew: 200ps (maximum) • Propagation delay: QA, nQA: 450ps ( | RENESAS 瑞萨 | |||
Dual 2:1, 1:2 Differential-to-LVPECL/ ECL Multiplexer Features • Dual 2:1, 1:2 MUX • Three LVPECL output pairs • Three differential clock inputs can accept: LVPECL, LVDS, CML • Loopback test mode available • Maximum output frequency: 2.5GHz • Propagation delay: 550ps (maximum) • Part-to-part skew: 275ps (maximum) • Additive phase jitter, RMS: | RENESAS 瑞萨 | |||
Low Skew, 1-to-4, Differential-to-2.5V, 3.3V LVPECL Fanout Buffer 文件:278.38 Kbytes Page:20 Pages | IDT | |||
Low Skew, 1-to-4, Differential-to-2.5V, 3.3V LVPECL Fanout Buffer 文件:278.38 Kbytes Page:20 Pages | IDT | |||
Low Skew, 1-to-4, Differential-to-2.5V, 3.3V LVPECL Fanout Buffer 文件:278.38 Kbytes Page:20 Pages | IDT | |||
Low Skew, 1-to-4, Differential-to-2.5V, 3.3V LVPECL Fanout Buffer 文件:278.38 Kbytes Page:20 Pages | IDT | |||
包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC CLOCK MANANGEMENT 集成电路(IC) 时钟缓冲器,驱动器 | ETC 知名厂家 | ETC | ||
Low Skew, 1-to-4, Differential-to-2.5V, 3.3V LVPECL Fanout Buffer 文件:278.38 Kbytes Page:20 Pages | IDT | |||
封装/外壳:20-TSSOP(0.173",4.40mm 宽) 包装:卷带(TR) 描述:IC CLK BUFFER 1:6 2GHZ 20TSSOP 集成电路(IC) 时钟缓冲器,驱动器 | ETC 知名厂家 | ETC | ||
Low Skew,1-to-6,Differential-to-2.5V,3.3V LVPECL/ECL Fanout Buffer | RENESAS 瑞萨 | |||
2:1 Differential-to-LVPECL Multiplexer 文件:435.13 Kbytes Page:23 Pages | IDT | |||
Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer 文件:601.31 Kbytes Page:20 Pages | IDT | |||
Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer 文件:601.31 Kbytes Page:20 Pages | IDT | |||
LVPECL/ ECL Fanout Buffer 文件:315.73 Kbytes Page:20 Pages | IDT | |||
LVPECL/ ECL Fanout Buffer 文件:315.73 Kbytes Page:20 Pages | IDT | |||
Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer 文件:601.31 Kbytes Page:20 Pages | IDT | |||
LVPECL/ ECL Fanout Buffer 文件:315.73 Kbytes Page:20 Pages | IDT | |||
LVPECL/ ECL Fanout Buffer 文件:315.73 Kbytes Page:20 Pages | IDT |
853S产品属性
- 类型
描述
- 型号
853S
- 制造商
Integrated Device Technology Inc
- 功能描述
FANOUT BUFFER FROM IDT'S HIPERCLOCKS FAMILY - Trays
- 制造商
Integrated Device Technology Inc
- 功能描述
Clock Buffer
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
IDT |
21+ |
TSSOP20 |
4436 |
十年信誉,只做原装,有挂就有现货! |
|||
IDT |
23+ |
TSSOP20 |
3000 |
只做原装假一赔十 |
|||
IDT |
23+ |
TSSOP20 |
215 |
新到现货 全新原装 |
|||
IDT |
SOP-8 |
23+ |
6000 |
专业配单原装正品假一罚十 |
|||
IDT |
2447+ |
TSSOP |
9657 |
只做原装正品假一赔十为客户做到零风险!! |
|||
IDT |
22+ |
TSSOP20 |
9000 |
支持任何机构检测 只做原装正品 |
|||
IDT |
24+ |
TSSOP-8 |
6800 |
100%原装进口现货,欢迎来电咨询 |
|||
IDT |
25+ |
623 |
全新原装!优势库存热卖中! |
||||
IDT |
24+ |
QFP |
159447 |
明嘉莱只做原装正品现货 |
|||
RENESAS/瑞萨 |
25+ |
TSSOP |
32000 |
RENESAS/瑞萨全新特价8535AGI-31LFT即刻询购立享优惠#长期有货 |
853S芯片相关品牌
853S规格书下载地址
853S参数引脚图相关
- 9905
- 97an
- 9600
- 95160
- 9511
- 95003
- 9369
- 9223
- 9192
- 9110
- 9023
- 9018
- 9014
- 9012
- 9001
- 8位移位寄存器
- 89c51
- 89c2051
- 88e6060
- 8550
- 854654
- 854653
- 854652
- 854651
- 85463
- 854622
- 8545HS
- 8545BGT
- 8545BG
- 854565
- 8545-01
- 8542HS
- 85411I
- 85411
- 85408I
- 85403-10A
- 85402-10A
- 8540190000
- 854-002
- 854-001
- 8540
- 85-4
- 854
- 853S9252BKILF
- 853S310CVILF
- 853S111BYILF
- 853S111AYILF
- 853S058
- 853S057AGILF
- 853S031BYILF
- 853S024
- 853S01AKILF
- 853S01AGILF
- 853S014AGILF
- 853S012AKILF
- 853S011CMILF
- 853S011CGILF
- 853S011BMILF
- 853S01
- 853S006AGILF
- 853968-1
- 8-53941-1
- 853-93-100-30-001000
- 853-93-100-20-001000
- 853-93-100-10-001000
- 853-93-010-10-001000
- 853-87-100-10-001101
- 853-87-050-10-001101
- 853-87-044-10-001101
- 853-87-034-20-001101
- 853-87-024-10-001101
- 853-87-014-30-001191
- 853-87-012-10-001101
- 853-87-010-30-001101
- 853-87-010-10-001101
- 853-87-008-20-001101
- 8538-31
- 853-83-010-10-002101
- 85372
- 8537-0690
- 8537-0689
- 8536CGI-33LF
- 8536-02
- 85356
- 8535-21
- 85352
- 8534A
- 8534-01
- 8533-11
- 8533-01
- 8532R
- 85322
- 85320
- 85311I
- 85311
- 8531-01
- 8530UV
- 853075
- 85301AG
- 853-016
853S数据表相关新闻
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DdatasheetPDF页码索引
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- P11
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