853S01价格

参考价格:¥17.8702

型号:853S011BMILF 品牌:IDT 备注:这里有853S01多少钱,2025年最近7天走势,今日出价,今日竞价,853S01批发/采购报价,853S01行情走势销售排行榜,853S01报价。
型号 功能描述 生产厂家 企业 LOGO 操作
853S01

2:1 Differential-to-LVPECL Multiplexer

Features • One LVPECL output pair • Two selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx • Part-

RENESAS

瑞萨

853S01

2:1 Differential-to-LVPECL Multiplexer

文件:435.13 Kbytes Page:23 Pages

IDT

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

Features • Two differential 2.5V, 3.3V LVPECL/ECL outputs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: >2.5GHz • Translates any single-ended input signal to 3.3V LVPECL le

RENESAS

瑞萨

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

Features • Two differential 2.5V, 3.3V LVPECL/ECL outputs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: >2.5GHz • Translates any single-ended input signal to 3.3V LVPECL le

RENESAS

瑞萨

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

Features • Two differential 2.5V, 3.3V LVPECL/ECL outputs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: >2.5GHz • Translates any single-ended input signal to 3.3V LVPECL le

RENESAS

瑞萨

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

Features • Two differential 2.5V, 3.3V LVPECL/ECL outputs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: >2.5GHz • Translates any single-ended input signal to 3.3V LVPECL le

RENESAS

瑞萨

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

Features • Two differential 2.5V, 3.3V LVPECL/ECL outputs • One differential PCLK, nPCLK input pair • PCLK, nPCLK pairs can accept the following differential input levels: LVPECL, LVDS, CML, SSTL • Maximum output frequency: >2.5GHz • Translates any single-ended input signal to 3.3V LVPECL le

RENESAS

瑞萨

12:1, Differential-to-3.3V, 2.5V LVPECL Clock/Data Multiplexer

Features • High speed 12:1 differential multiplexer • One differential 3.3V or 2.5V LVPECL output • Twelve selectable differential clock or data inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Maximum output frequency: 3.2GHz • Translates a

RENESAS

瑞萨

12:1, Differential-to-3.3V, 2.5V LVPECL Clock/Data Multiplexer

Features • High speed 12:1 differential multiplexer • One differential 3.3V or 2.5V LVPECL output • Twelve selectable differential clock or data inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Maximum output frequency: 3.2GHz • Translates a

RENESAS

瑞萨

2:1 Differential-to-LVPECL Multiplexer

Features • One LVPECL output pair • Two selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx • Part-

RENESAS

瑞萨

2:1 Differential-to-LVPECL Multiplexer

Features • One LVPECL output pair • Two selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx • Part-

RENESAS

瑞萨

2:1 Differential-to-LVPECL Multiplexer

Features • One LVPECL output pair • Two selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx • Part-

RENESAS

瑞萨

2:1 Differential-to-LVPECL Multiplexer

Features • One LVPECL output pair • Two selectable differential LVPECL clock inputs • PCLKx, nPCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML • Translates LVCMOS/LVTTL input signals to LVPECL levels by using a resistor bias network on nPCLKx, nPCLKx • Part-

RENESAS

瑞萨

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

文件:601.31 Kbytes Page:20 Pages

IDT

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

文件:601.31 Kbytes Page:20 Pages

IDT

LVPECL/ ECL Fanout Buffer

文件:315.73 Kbytes Page:20 Pages

IDT

LVPECL/ ECL Fanout Buffer

文件:315.73 Kbytes Page:20 Pages

IDT

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

文件:601.31 Kbytes Page:20 Pages

IDT

封装/外壳:8-TSSOP,8-MSOP(0.118",3.00mm 宽) 包装:卷带(TR) 描述:IC CLK BUFFER 1:2 2.5GHZ 8TSSOP 集成电路(IC) 时钟缓冲器,驱动器

ETC

知名厂家

LVPECL/ ECL Fanout Buffer

文件:315.73 Kbytes Page:20 Pages

IDT

LVPECL/ ECL Fanout Buffer

文件:315.73 Kbytes Page:20 Pages

IDT

LVPECL/ ECL Fanout Buffer

文件:315.73 Kbytes Page:20 Pages

IDT

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

文件:601.31 Kbytes Page:20 Pages

IDT

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ECL Fanout Buffer

文件:830.7 Kbytes Page:20 Pages

IDT

封装/外壳:8-SOIC(0.154",3.90mm 宽) 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC CLK BUFFER 1:2 2.5GHZ 8SOIC 集成电路(IC) 时钟缓冲器,驱动器

ETC

知名厂家

Low Skew, 1-to-2, Differential-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

文件:601.31 Kbytes Page:20 Pages

IDT

LVPECL/ ECL Fanout Buffer

文件:315.73 Kbytes Page:20 Pages

IDT

Low Skew,1-to-2,Differential-to-2.5V,3.3V LVPECL/ECL Fanout Buffer

RENESAS

瑞萨

12:1, Different ial-to-3.3V, 2.5V LVPECL Clock/Data Mult iplexer

文件:495.39 Kbytes Page:20 Pages

IDT

12:1, Different ial-to-3.3V, 2.5V LVPECL Clock/Data Mult iplexer

文件:495.39 Kbytes Page:20 Pages

IDT

12:1 Differential-to-3.3V,2.5V LVPECL Clock/Data Multiplexer

RENESAS

瑞萨

Low Skew,Dual,1-to-3,Differential-to-2.5V,3.3V LVPECL/ECL Fanout Buffer

RENESAS

瑞萨

2:1 Differential-to-LVPECL Multiplexer

文件:435.13 Kbytes Page:23 Pages

IDT

2:1 Differential-to-LVPECL Multiplexer

文件:435.13 Kbytes Page:23 Pages

IDT

2:1 Differential-to-LVPECL Multiplexer

文件:435.13 Kbytes Page:23 Pages

IDT

2:1 Differential-to-LVPECL Multiplexer

文件:435.13 Kbytes Page:23 Pages

IDT

853S01产品属性

  • 类型

    描述

  • 型号

    853S01

  • 功能描述

    时钟缓冲器

  • 1

    2 LVPECL/ECL Fanout Buffer

  • RoHS

  • 制造商

    Texas Instruments

  • 输出端数量

    5

  • 最大输入频率

    40 MHz

  • 电源电压-最大

    3.45 V

  • 电源电压-最小

    2.375 V

  • 最大工作温度

    + 85 C

  • 最小工作温度

    - 40 C

  • 封装/箱体

    LLP-24

  • 封装

    Reel

更新时间:2025-11-3 23:00:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
Renesas(瑞萨)
24+
标准封装
12048
支持大陆交货,美金交易。原装现货库存。
IDT
25+
TSSOP8
54815
百分百原装现货,实单必成,欢迎询价
24+
TSSOP8
20000
全新原厂原装,进口正品现货,正规渠道可含税!!
IDT
23+
TSSOP
50000
只做原装正品
IDT
23+
TSSOP
7850
只做原装正品假一赔十为客户做到零风险!!
ICS
24+
QFN
3000
只做原装正品现货 欢迎来电查询15919825718
IDT
24+
TSSOP-8
6800
100%原装进口现货,欢迎来电咨询
RENESAS
两年内
NA
1474
实单价格可谈
IDT(Renesas收购)
24+
N/A
7368
原厂可订货,技术支持,直接渠道。可签保供合同
RENESAS ELECTRONICS
23+
SMD
880000
明嘉莱只做原装正品现货

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