AXL E EC DI8 DO8 M12 6M

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12 Bit, 2-to-1, 3.3V, 2.5V LVPECL Clock Buffer

Features • Twelve, 2-to-1 multiplexers with LVPECL outputs • Selectable differential CLKx, nCLKx input pairs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Individual select control for each multiplex

Low Skew, 1-to-2 LVCMOS/ LVTTL-to-3.3V LVPECL CLock Generator

Features • Two differential 3.3V LVPECL outputs • Selectable CLK0 or CLK1 inputs for redundant and multiple frequency fanout applications • CLK0 or CLK1 can accept the following input levels: LVCMOS or LVTTL • Maximum output frequency: 266MHz • Translates LVCMOS and LVTTL levels to 3.3V LVP

12 Bit, 2-to-1, 3.3V, 2.5V LVPECL Clock Buffer

Features • Twelve, 2-to-1 multiplexers with LVPECL outputs • Selectable differential CLKx, nCLKx input pairs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Individual select control for each multiplex

12 Bit, 2-to-1, 3.3V, 2.5V LVPECL Clock Buffer

Features • Twelve, 2-to-1 multiplexers with LVPECL outputs • Selectable differential CLKx, nCLKx input pairs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Maximum output frequency: 700MHz • Individual select control for each multiplex

2:1, Differential-to-3.3V Dual LVPECL/ECL Clock Multiplexer

Features • High speed differential muliplexer. The device can be configured as a 2:1 multiplexer • Dual 3.3V LVPECL outputs • Selectable differential CLKx/nCLKx input pairs • Differential CLKx/nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Output f

2:1, Differential-to-3.3V Dual LVPECL/ECL Clock Multiplexer

Features • High speed differential muliplexer. The device can be configured as a 2:1 multiplexer • Dual 3.3V LVPECL outputs • Selectable differential CLKx/nCLKx input pairs • Differential CLKx/nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Output f

2:1, Differential-to-3.3V Dual LVPECL/ECL Clock Multiplexer

Features • High speed differential muliplexer. The device can be configured as a 2:1 multiplexer • Dual 3.3V LVPECL outputs • Selectable differential CLKx/nCLKx input pairs • Differential CLKx/nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Output f

2:1, Differential-to-3.3V Dual LVPECL/ECL Clock Multiplexer

Features • High speed differential muliplexer. The device can be configured as a 2:1 multiplexer • Dual 3.3V LVPECL outputs • Selectable differential CLKx/nCLKx input pairs • Differential CLKx/nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Output f

2:1, Differential-to-3.3V Dual LVPECL/ECL Clock Multiplexer

Features • High speed differential muliplexer. The device can be configured as a 2:1 multiplexer • Dual 3.3V LVPECL outputs • Selectable differential CLKx/nCLKx input pairs • Differential CLKx/nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Output f

Low Skew, 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL Fanout Buffer

Features •Fourdifferential3.3VLVPECLoutputs •SelectableCLK0orCLK1inputsforredundantandmultiplefrequencyfanoutapplications •CLK0orCLK1canacceptthefollowinginputlevels:LVCMOSorLVTTL •Maximumoutputfrequency:266MHz •TranslatesLVCMOSandLVTTLlevelsto3.3VLVPECLlevels •Outputskew:30ps(maximum) •Par

LVPECL Fanout Buffer

GENERAL DESCRIPTION The ICS8535-01 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS8535-01 has two single ended clock inputs. FEATURES • Four differential 3.3V LVPECL ou

LVPECL Fanout Buffer

GENERAL DESCRIPTION The ICS8535-01 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS8535-01 has two single ended clock inputs. FEATURES • Four differential 3.3V LVPECL ou

Low Skew, 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL Fanout Buffer

Features •Fourdifferential3.3VLVPECLoutputs •SelectableCLK0orCLK1inputsforredundantandmultiplefrequencyfanoutapplications •CLK0orCLK1canacceptthefollowinginputlevels:LVCMOSorLVTTL •Maximumoutputfrequency:266MHz •TranslatesLVCMOSandLVTTLlevelsto3.3VLVPECLlevels •Outputskew:30ps(maximum) •Par

LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOSTO- 3.3V LVPECL FANOUT BUFFER

FEATURES • 4 differential 3.3V LVPECL outputs • Selectable LVCMOS/LVTTL CLK or crystal inputs • CLK can accept the following input levels: LVCMOS, LVTTL • Maximum output frequency: 266MHz • Output skew: 30ps (maximum) • Part-to-part skew: 200ps (maximum) • Propagation delay: 1.65ns (maximum

LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOSTO- 3.3V LVPECL FANOUT BUFFER

FEATURES • 4 differential 3.3V LVPECL outputs • Selectable LVCMOS/LVTTL CLK or crystal inputs • CLK can accept the following input levels: LVCMOS, LVTTL • Maximum output frequency: 266MHz • Output skew: 30ps (maximum) • Part-to-part skew: 200ps (maximum) • Propagation delay: 1.65ns (maximum

LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOSTO- 3.3V LVPECL FANOUT BUFFER

FEATURES • 4 differential 3.3V LVPECL outputs • Selectable LVCMOS/LVTTL CLK or crystal inputs • CLK can accept the following input levels: LVCMOS, LVTTL • Maximum output frequency: 266MHz • Output skew: 30ps (maximum) • Part-to-part skew: 200ps (maximum) • Propagation delay: 1.65ns (maximum

LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOSTO- 3.3V LVPECL FANOUT BUFFER

FEATURES • 4 differential 3.3V LVPECL outputs • Selectable LVCMOS/LVTTL CLK or crystal inputs • CLK can accept the following input levels: LVCMOS, LVTTL • Maximum output frequency: 266MHz • Output skew: 30ps (maximum) • Part-to-part skew: 200ps (maximum) • Propagation delay: 1.65ns (maximum

Low Skew, 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL Fanout Buffer

FEATURES • Four differential 3.3V LVPECL outputs • Selectable CLK0 or CLK1 inputs for redundant and multiple frequency fanout applications • CLK0 or CLK1 can accept the following input levels: LVCMOS or LVTTL • Maximum output frequency: 266MHz • Translates LVCMOS and LVTTL levels to 3.3V L

Low Skew, 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL Fanout Buffer

FEATURES • Four differential 3.3V LVPECL outputs • Selectable CLK0 or CLK1 inputs for redundant and multiple frequency fanout applications • CLK0 or CLK1 can accept the following input levels: LVCMOS or LVTTL • Maximum output frequency: 266MHz • Translates LVCMOS and LVTTL levels to 3.3V L

Low Skew, 1-To-4, Crystal Oscillator/LVCMOS-To-3.3V LVPECL Fanout Buffer

Features • Four differential 3.3V LVPECL outputs • Selectable LVCMOS/LVTTL CLK or crystal inputs • CLK can accept the following input levels: LVCMOS, LVTTL • Maximum output frequency: 266MHz • Output skew: 30ps (typical) • Part-to-part skew: 200ps (maximum) • Propagation delay: 1.75ns (maxi

Low Skew, 1-To-4, Crystal Oscillator/LVCMOS-To-3.3V LVPECL Fanout Buffer

Features • Four differential 3.3V LVPECL outputs • Selectable LVCMOS/LVTTL CLK or crystal inputs • CLK can accept the following input levels: LVCMOS, LVTTL • Maximum output frequency: 266MHz • Output skew: 30ps (typical) • Part-to-part skew: 200ps (maximum) • Propagation delay: 1.75ns (maxi

Low Skew, 1-To-4, Crystal Oscillator/LVCMOS-To-3.3V LVPECL Fanout Buffer

Features • Four differential 3.3V LVPECL outputs • Selectable LVCMOS/LVTTL CLK or crystal inputs • CLK can accept the following input levels: LVCMOS, LVTTL • Maximum output frequency: 266MHz • Output skew: 30ps (typical) • Part-to-part skew: 200ps (maximum) • Propagation delay: 1.75ns (maxi

Low Skew, 1-To-4, Crystal Oscillator/LVCMOS-To-3.3V LVPECL Fanout Buffer

Features • Four differential 3.3V LVPECL outputs • Selectable LVCMOS/LVTTL CLK or crystal inputs • CLK can accept the following input levels: LVCMOS, LVTTL • Maximum output frequency: 266MHz • Output skew: 30ps (typical) • Part-to-part skew: 200ps (maximum) • Propagation delay: 1.75ns (maxi

LVPECL Fanout Buffer

GENERAL DESCRIPTION The ICS8535-01 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS8535-01 has two single ended clock inputs. FEATURES • Four differential 3.3V LVPECL ou

Low Skew, 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL Fanout Buffer

Features •Fourdifferential3.3VLVPECLoutputs •SelectableCLK0orCLK1inputsforredundantandmultiplefrequencyfanoutapplications •CLK0orCLK1canacceptthefollowinginputlevels:LVCMOSorLVTTL •Maximumoutputfrequency:266MHz •TranslatesLVCMOSandLVTTLlevelsto3.3VLVPECLlevels •Outputskew:30ps(maximum) •Par

Low Skew, 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL Fanout Buffer

Features •Fourdifferential3.3VLVPECLoutputs •SelectableCLK0orCLK1inputsforredundantandmultiplefrequencyfanoutapplications •CLK0orCLK1canacceptthefollowinginputlevels:LVCMOSorLVTTL •Maximumoutputfrequency:266MHz •TranslatesLVCMOSandLVTTLlevelsto3.3VLVPECLlevels •Outputskew:30ps(maximum) •Par

LVPECL Fanout Buffer

GENERAL DESCRIPTION The ICS8535-01 is a low skew, high performance 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL fanout buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS8535-01 has two single ended clock inputs. FEATURES • Four differential 3.3V LVPECL ou

包装：散装 描述：FIRST AID SIGN 标签，标志，护栏，标识 标志，铭牌，招贴

包装：盒 描述：LED PERM. BEACON BWM 12VDC BU 工业自动化与控制 可堆叠塔式照明和元器件

EMILY??Power Board Connector

文件：214.9 Kbytes Page：5 Pages

LVPECL Clock Buffer

文件：358.36 Kbytes Page：20 Pages

Low Skew, 1-to-2 LVCMOS/ LVTTL-to-3.3V LVPECL CLock Generator

文件：394.76 Kbytes Page：15 Pages

LVPECL Clock Buffer

文件：358.36 Kbytes Page：20 Pages

LVPECL Clock Buffer

文件：358.36 Kbytes Page：20 Pages

Propagation delay

文件：611.27 Kbytes Page：15 Pages

Low Skew, 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL Fanout Buffer

文件：235.05 Kbytes Page：16 Pages

Low Skew, 1-to-4 LVCMOS/LVTTL-to-3.3V LVPECL Fanout Buffer

文件：235.05 Kbytes Page：16 Pages

LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO- 3.3V LVPECL CLOCK GENERATOR

文件：762.2 Kbytes Page：14 Pages

LOW SKEW, 1-TO-2 LVCMOS/LVTTL-TO- 3.3V LVPECL CLOCK GENERATOR

文件：762.2 Kbytes Page：14 Pages

LVPECL Fanout Buffer

文件：847.89 Kbytes Page：15 Pages

LVPECL Fanout Buffer

文件：847.89 Kbytes Page：15 Pages

LVPECL Fanout Buffer

文件：847.89 Kbytes Page：15 Pages

LVPECL Fanout Buffer

文件：847.89 Kbytes Page：15 Pages

8-bit Microcontrolle with 8K Bytes In-System Programmable Flash

Overview The ATmega8535 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the ATmega8535 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus proces

8-bit AVR Microcontroller with 8K Bytes In-System Programmable Flash

Overview The ATmega8535 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the ATmega8535 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus proces

8-bit Microcontrolle with 8K Bytes In-System Programmable Flash

Overview The ATmega8535 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing instructions in a single clock cycle, the ATmega8535 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus proces

6-Line EMI Filter with Integrated ESD Protection

文件：274.43 Kbytes Page：7 Pages